| 1 | /* SPDX-License-Identifier: MIT */ |
| 2 | /* |
| 3 | * Copyright © 2014-2019 Intel Corporation |
| 4 | */ |
| 5 | |
| 6 | #ifndef _INTEL_UC_FW_H_ |
| 7 | #define _INTEL_UC_FW_H_ |
| 8 | |
| 9 | #include <linux/sizes.h> |
| 10 | #include <linux/types.h> |
| 11 | #include "intel_uc_fw_abi.h" |
| 12 | #include "intel_device_info.h" |
| 13 | #include "i915_gem.h" |
| 14 | #include "i915_vma.h" |
| 15 | |
| 16 | struct drm_printer; |
| 17 | struct drm_i915_private; |
| 18 | struct intel_gt; |
| 19 | |
| 20 | /* Home of GuC, HuC and DMC firmwares */ |
| 21 | #define INTEL_UC_FIRMWARE_URL "https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/i915" |
| 22 | |
| 23 | /* |
| 24 | * +------------+---------------------------------------------------+ |
| 25 | * | PHASE | FIRMWARE STATUS TRANSITIONS | |
| 26 | * +============+===================================================+ |
| 27 | * | | UNINITIALIZED | |
| 28 | * +------------+- / | \ -+ |
| 29 | * | | DISABLED <--/ | \--> NOT_SUPPORTED | |
| 30 | * | init_early | V | |
| 31 | * | | SELECTED | |
| 32 | * +------------+- / | \ -+ |
| 33 | * | | MISSING <--/ | \--> ERROR | |
| 34 | * | fetch | V | |
| 35 | * | | AVAILABLE | |
| 36 | * +------------+- | \ -+ |
| 37 | * | | | \--> INIT FAIL | |
| 38 | * | init | V | |
| 39 | * | | /------> LOADABLE <----<-----------\ | |
| 40 | * +------------+- \ / \ \ \ -+ |
| 41 | * | | LOAD FAIL <--< \--> TRANSFERRED \ | |
| 42 | * | upload | \ / \ / | |
| 43 | * | | \---------/ \--> RUNNING | |
| 44 | * +------------+---------------------------------------------------+ |
| 45 | */ |
| 46 | |
| 47 | enum intel_uc_fw_status { |
| 48 | INTEL_UC_FIRMWARE_NOT_SUPPORTED = -1, /* no uc HW */ |
| 49 | INTEL_UC_FIRMWARE_UNINITIALIZED = 0, /* used to catch checks done too early */ |
| 50 | INTEL_UC_FIRMWARE_DISABLED, /* disabled */ |
| 51 | INTEL_UC_FIRMWARE_SELECTED, /* selected the blob we want to load */ |
| 52 | INTEL_UC_FIRMWARE_MISSING, /* blob not found on the system */ |
| 53 | INTEL_UC_FIRMWARE_ERROR, /* invalid format or version */ |
| 54 | INTEL_UC_FIRMWARE_AVAILABLE, /* blob found and copied in mem */ |
| 55 | INTEL_UC_FIRMWARE_INIT_FAIL, /* failed to prepare fw objects for load */ |
| 56 | INTEL_UC_FIRMWARE_LOADABLE, /* all fw-required objects are ready */ |
| 57 | INTEL_UC_FIRMWARE_LOAD_FAIL, /* failed to xfer or init/auth the fw */ |
| 58 | INTEL_UC_FIRMWARE_TRANSFERRED, /* dma xfer done */ |
| 59 | INTEL_UC_FIRMWARE_RUNNING /* init/auth done */ |
| 60 | }; |
| 61 | |
| 62 | enum intel_uc_fw_type { |
| 63 | INTEL_UC_FW_TYPE_GUC = 0, |
| 64 | INTEL_UC_FW_TYPE_HUC, |
| 65 | INTEL_UC_FW_TYPE_GSC, |
| 66 | }; |
| 67 | #define INTEL_UC_FW_NUM_TYPES 3 |
| 68 | |
| 69 | struct intel_uc_fw_ver { |
| 70 | u32 major; |
| 71 | u32 minor; |
| 72 | u32 patch; |
| 73 | u32 build; |
| 74 | }; |
| 75 | |
| 76 | /* |
| 77 | * The firmware build process will generate a version header file with major and |
| 78 | * minor version defined. The versions are built into CSS header of firmware. |
| 79 | * i915 kernel driver set the minimal firmware version required per platform. |
| 80 | */ |
| 81 | struct intel_uc_fw_file { |
| 82 | const char *path; |
| 83 | struct intel_uc_fw_ver ver; |
| 84 | }; |
| 85 | |
| 86 | /* |
| 87 | * This structure encapsulates all the data needed during the process |
| 88 | * of fetching, caching, and loading the firmware image into the uC. |
| 89 | */ |
| 90 | struct intel_uc_fw { |
| 91 | enum intel_uc_fw_type type; |
| 92 | union { |
| 93 | const enum intel_uc_fw_status status; |
| 94 | enum intel_uc_fw_status __status; /* no accidental overwrites */ |
| 95 | }; |
| 96 | struct intel_uc_fw_file file_wanted; |
| 97 | struct intel_uc_fw_file file_selected; |
| 98 | bool user_overridden; |
| 99 | size_t size; |
| 100 | struct drm_i915_gem_object *obj; |
| 101 | |
| 102 | /** |
| 103 | * @needs_ggtt_mapping: indicates whether the fw object needs to be |
| 104 | * pinned to ggtt. If true, the fw is pinned at init time and unpinned |
| 105 | * during driver unload. |
| 106 | */ |
| 107 | bool needs_ggtt_mapping; |
| 108 | |
| 109 | /** |
| 110 | * @vma_res: A vma resource used in binding the uc fw to ggtt. The fw is |
| 111 | * pinned in a reserved area of the ggtt (above the maximum address |
| 112 | * usable by GuC); therefore, we can't use the normal vma functions to |
| 113 | * do the pinning and we instead use this resource to do so. |
| 114 | */ |
| 115 | struct i915_vma_resource vma_res; |
| 116 | struct i915_vma *rsa_data; |
| 117 | |
| 118 | u32 rsa_size; |
| 119 | u32 ucode_size; |
| 120 | u32 private_data_size; |
| 121 | |
| 122 | u32 dma_start_offset; |
| 123 | |
| 124 | bool ; |
| 125 | }; |
| 126 | |
| 127 | /* |
| 128 | * When we load the uC binaries, we pin them in a reserved section at the top of |
| 129 | * the GGTT, which is ~18 MBs. On multi-GT systems where the GTs share the GGTT, |
| 130 | * we also need to make sure that each binary is pinned to a unique location |
| 131 | * during load, because the different GT can go through the FW load at the same |
| 132 | * time (see uc_fw_ggtt_offset() for details). |
| 133 | * Given that the available space is much greater than what is required by the |
| 134 | * binaries, to keep things simple instead of dynamically partitioning the |
| 135 | * reserved section to make space for all the blobs we can just reserve a static |
| 136 | * chunk for each binary. |
| 137 | */ |
| 138 | #define INTEL_UC_RSVD_GGTT_PER_FW SZ_2M |
| 139 | |
| 140 | #ifdef CONFIG_DRM_I915_DEBUG_GUC |
| 141 | void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, |
| 142 | enum intel_uc_fw_status status); |
| 143 | #else |
| 144 | static inline void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, |
| 145 | enum intel_uc_fw_status status) |
| 146 | { |
| 147 | uc_fw->__status = status; |
| 148 | } |
| 149 | #endif |
| 150 | |
| 151 | static inline |
| 152 | const char *intel_uc_fw_status_repr(enum intel_uc_fw_status status) |
| 153 | { |
| 154 | switch (status) { |
| 155 | case INTEL_UC_FIRMWARE_NOT_SUPPORTED: |
| 156 | return "N/A" ; |
| 157 | case INTEL_UC_FIRMWARE_UNINITIALIZED: |
| 158 | return "UNINITIALIZED" ; |
| 159 | case INTEL_UC_FIRMWARE_DISABLED: |
| 160 | return "DISABLED" ; |
| 161 | case INTEL_UC_FIRMWARE_SELECTED: |
| 162 | return "SELECTED" ; |
| 163 | case INTEL_UC_FIRMWARE_MISSING: |
| 164 | return "MISSING" ; |
| 165 | case INTEL_UC_FIRMWARE_ERROR: |
| 166 | return "ERROR" ; |
| 167 | case INTEL_UC_FIRMWARE_AVAILABLE: |
| 168 | return "AVAILABLE" ; |
| 169 | case INTEL_UC_FIRMWARE_INIT_FAIL: |
| 170 | return "INIT FAIL" ; |
| 171 | case INTEL_UC_FIRMWARE_LOADABLE: |
| 172 | return "LOADABLE" ; |
| 173 | case INTEL_UC_FIRMWARE_LOAD_FAIL: |
| 174 | return "LOAD FAIL" ; |
| 175 | case INTEL_UC_FIRMWARE_TRANSFERRED: |
| 176 | return "TRANSFERRED" ; |
| 177 | case INTEL_UC_FIRMWARE_RUNNING: |
| 178 | return "RUNNING" ; |
| 179 | } |
| 180 | return "<invalid>" ; |
| 181 | } |
| 182 | |
| 183 | static inline int intel_uc_fw_status_to_error(enum intel_uc_fw_status status) |
| 184 | { |
| 185 | switch (status) { |
| 186 | case INTEL_UC_FIRMWARE_NOT_SUPPORTED: |
| 187 | return -ENODEV; |
| 188 | case INTEL_UC_FIRMWARE_UNINITIALIZED: |
| 189 | return -EACCES; |
| 190 | case INTEL_UC_FIRMWARE_DISABLED: |
| 191 | return -EPERM; |
| 192 | case INTEL_UC_FIRMWARE_MISSING: |
| 193 | return -ENOENT; |
| 194 | case INTEL_UC_FIRMWARE_ERROR: |
| 195 | return -ENOEXEC; |
| 196 | case INTEL_UC_FIRMWARE_INIT_FAIL: |
| 197 | case INTEL_UC_FIRMWARE_LOAD_FAIL: |
| 198 | return -EIO; |
| 199 | case INTEL_UC_FIRMWARE_SELECTED: |
| 200 | return -ESTALE; |
| 201 | case INTEL_UC_FIRMWARE_AVAILABLE: |
| 202 | case INTEL_UC_FIRMWARE_LOADABLE: |
| 203 | case INTEL_UC_FIRMWARE_TRANSFERRED: |
| 204 | case INTEL_UC_FIRMWARE_RUNNING: |
| 205 | return 0; |
| 206 | } |
| 207 | return -EINVAL; |
| 208 | } |
| 209 | |
| 210 | static inline const char *intel_uc_fw_type_repr(enum intel_uc_fw_type type) |
| 211 | { |
| 212 | switch (type) { |
| 213 | case INTEL_UC_FW_TYPE_GUC: |
| 214 | return "GuC" ; |
| 215 | case INTEL_UC_FW_TYPE_HUC: |
| 216 | return "HuC" ; |
| 217 | case INTEL_UC_FW_TYPE_GSC: |
| 218 | return "GSC" ; |
| 219 | } |
| 220 | return "uC" ; |
| 221 | } |
| 222 | |
| 223 | static inline enum intel_uc_fw_status |
| 224 | __intel_uc_fw_status(struct intel_uc_fw *uc_fw) |
| 225 | { |
| 226 | /* shouldn't call this before checking hw/blob availability */ |
| 227 | GEM_BUG_ON(uc_fw->status == INTEL_UC_FIRMWARE_UNINITIALIZED); |
| 228 | return uc_fw->status; |
| 229 | } |
| 230 | |
| 231 | static inline bool intel_uc_fw_is_supported(struct intel_uc_fw *uc_fw) |
| 232 | { |
| 233 | return __intel_uc_fw_status(uc_fw) != INTEL_UC_FIRMWARE_NOT_SUPPORTED; |
| 234 | } |
| 235 | |
| 236 | static inline bool intel_uc_fw_is_enabled(struct intel_uc_fw *uc_fw) |
| 237 | { |
| 238 | return __intel_uc_fw_status(uc_fw) > INTEL_UC_FIRMWARE_DISABLED; |
| 239 | } |
| 240 | |
| 241 | static inline bool intel_uc_fw_is_available(struct intel_uc_fw *uc_fw) |
| 242 | { |
| 243 | return __intel_uc_fw_status(uc_fw) >= INTEL_UC_FIRMWARE_AVAILABLE; |
| 244 | } |
| 245 | |
| 246 | static inline bool intel_uc_fw_is_loadable(struct intel_uc_fw *uc_fw) |
| 247 | { |
| 248 | return __intel_uc_fw_status(uc_fw) >= INTEL_UC_FIRMWARE_LOADABLE; |
| 249 | } |
| 250 | |
| 251 | static inline bool intel_uc_fw_is_loaded(struct intel_uc_fw *uc_fw) |
| 252 | { |
| 253 | return __intel_uc_fw_status(uc_fw) >= INTEL_UC_FIRMWARE_TRANSFERRED; |
| 254 | } |
| 255 | |
| 256 | static inline bool intel_uc_fw_is_running(struct intel_uc_fw *uc_fw) |
| 257 | { |
| 258 | return __intel_uc_fw_status(uc_fw) == INTEL_UC_FIRMWARE_RUNNING; |
| 259 | } |
| 260 | |
| 261 | static inline bool intel_uc_fw_is_in_error(struct intel_uc_fw *uc_fw) |
| 262 | { |
| 263 | return intel_uc_fw_status_to_error(status: __intel_uc_fw_status(uc_fw)) != 0; |
| 264 | } |
| 265 | |
| 266 | static inline bool intel_uc_fw_is_overridden(const struct intel_uc_fw *uc_fw) |
| 267 | { |
| 268 | return uc_fw->user_overridden; |
| 269 | } |
| 270 | |
| 271 | static inline void intel_uc_fw_sanitize(struct intel_uc_fw *uc_fw) |
| 272 | { |
| 273 | if (intel_uc_fw_is_loaded(uc_fw)) |
| 274 | intel_uc_fw_change_status(uc_fw, status: INTEL_UC_FIRMWARE_LOADABLE); |
| 275 | } |
| 276 | |
| 277 | static inline u32 __intel_uc_fw_get_upload_size(struct intel_uc_fw *uc_fw) |
| 278 | { |
| 279 | return sizeof(struct uc_css_header) + uc_fw->ucode_size; |
| 280 | } |
| 281 | |
| 282 | /** |
| 283 | * intel_uc_fw_get_upload_size() - Get size of firmware needed to be uploaded. |
| 284 | * @uc_fw: uC firmware. |
| 285 | * |
| 286 | * Get the size of the firmware and header that will be uploaded to WOPCM. |
| 287 | * |
| 288 | * Return: Upload firmware size, or zero on firmware fetch failure. |
| 289 | */ |
| 290 | static inline u32 intel_uc_fw_get_upload_size(struct intel_uc_fw *uc_fw) |
| 291 | { |
| 292 | if (!intel_uc_fw_is_available(uc_fw)) |
| 293 | return 0; |
| 294 | |
| 295 | return __intel_uc_fw_get_upload_size(uc_fw); |
| 296 | } |
| 297 | |
| 298 | void intel_uc_fw_version_from_gsc_manifest(struct intel_uc_fw_ver *ver, |
| 299 | const void *data); |
| 300 | int intel_uc_check_file_version(struct intel_uc_fw *uc_fw, bool *old_ver); |
| 301 | void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw, |
| 302 | enum intel_uc_fw_type type, |
| 303 | bool needs_ggtt_mapping); |
| 304 | int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw); |
| 305 | void intel_uc_fw_cleanup_fetch(struct intel_uc_fw *uc_fw); |
| 306 | int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, u32 offset, u32 dma_flags); |
| 307 | int intel_uc_fw_init(struct intel_uc_fw *uc_fw); |
| 308 | void intel_uc_fw_fini(struct intel_uc_fw *uc_fw); |
| 309 | void intel_uc_fw_resume_mapping(struct intel_uc_fw *uc_fw); |
| 310 | size_t intel_uc_fw_copy_rsa(struct intel_uc_fw *uc_fw, void *dst, u32 max_len); |
| 311 | int intel_uc_fw_mark_load_failed(struct intel_uc_fw *uc_fw, int err); |
| 312 | void intel_uc_fw_dump(const struct intel_uc_fw *uc_fw, struct drm_printer *p); |
| 313 | |
| 314 | #endif |
| 315 | |