| 1 | /* SPDX-License-Identifier: MIT */ |
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| 2 | /* |
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| 3 | * Copyright © 2022 Intel Corporation |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef _INTEL_GSC_UC_H_ |
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| 7 | #define _INTEL_GSC_UC_H_ |
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| 8 | |
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| 9 | #include "intel_uc_fw.h" |
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| 10 | |
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| 11 | struct drm_printer; |
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| 12 | struct i915_vma; |
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| 13 | struct intel_context; |
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| 14 | struct i915_gsc_proxy_component; |
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| 15 | |
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| 16 | struct intel_gsc_uc { |
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| 17 | /* Generic uC firmware management */ |
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| 18 | struct intel_uc_fw fw; |
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| 19 | |
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| 20 | /* GSC-specific additions */ |
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| 21 | |
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| 22 | /* |
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| 23 | * The GSC has 3 version numbers: |
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| 24 | * - Release version (incremented with each build) |
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| 25 | * - Security version (incremented on security fix) |
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| 26 | * - Compatibility version (incremented on interface change) |
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| 27 | * |
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| 28 | * The one we care about to use the binary is the last one, so that's |
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| 29 | * the one we save inside the intel_uc_fw structure. The other two |
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| 30 | * versions are only used for debug/info purposes, so we save them here. |
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| 31 | * |
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| 32 | * Note that the release and security versions are available in the |
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| 33 | * binary header, while the compatibility version must be queried after |
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| 34 | * loading the binary. |
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| 35 | */ |
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| 36 | struct intel_uc_fw_ver release; |
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| 37 | u32 security_version; |
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| 38 | |
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| 39 | struct i915_vma *local; /* private memory for GSC usage */ |
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| 40 | void __iomem *local_vaddr; /* pointer to access the private memory */ |
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| 41 | struct intel_context *ce; /* for submission to GSC FW via GSC engine */ |
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| 42 | |
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| 43 | /* for delayed load and proxy handling */ |
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| 44 | struct workqueue_struct *wq; |
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| 45 | struct work_struct work; |
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| 46 | u32 gsc_work_actions; /* protected by gt->irq_lock */ |
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| 47 | #define GSC_ACTION_FW_LOAD BIT(0) |
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| 48 | #define GSC_ACTION_SW_PROXY BIT(1) |
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| 49 | |
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| 50 | struct { |
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| 51 | struct i915_gsc_proxy_component *component; |
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| 52 | bool component_added; |
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| 53 | struct i915_vma *vma; |
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| 54 | void *to_gsc; |
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| 55 | void *to_csme; |
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| 56 | struct mutex mutex; /* protects the tee channel binding */ |
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| 57 | } proxy; |
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| 58 | }; |
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| 59 | |
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| 60 | void intel_gsc_uc_init_early(struct intel_gsc_uc *gsc); |
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| 61 | int intel_gsc_uc_init(struct intel_gsc_uc *gsc); |
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| 62 | void intel_gsc_uc_fini(struct intel_gsc_uc *gsc); |
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| 63 | void intel_gsc_uc_suspend(struct intel_gsc_uc *gsc); |
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| 64 | void intel_gsc_uc_resume(struct intel_gsc_uc *gsc); |
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| 65 | void intel_gsc_uc_flush_work(struct intel_gsc_uc *gsc); |
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| 66 | void intel_gsc_uc_load_start(struct intel_gsc_uc *gsc); |
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| 67 | void intel_gsc_uc_load_status(struct intel_gsc_uc *gsc, struct drm_printer *p); |
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| 68 | |
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| 69 | static inline bool intel_gsc_uc_is_supported(struct intel_gsc_uc *gsc) |
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| 70 | { |
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| 71 | return intel_uc_fw_is_supported(uc_fw: &gsc->fw); |
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| 72 | } |
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| 73 | |
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| 74 | static inline bool intel_gsc_uc_is_wanted(struct intel_gsc_uc *gsc) |
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| 75 | { |
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| 76 | return intel_uc_fw_is_enabled(uc_fw: &gsc->fw); |
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| 77 | } |
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| 78 | |
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| 79 | static inline bool intel_gsc_uc_is_used(struct intel_gsc_uc *gsc) |
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| 80 | { |
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| 81 | GEM_BUG_ON(__intel_uc_fw_status(&gsc->fw) == INTEL_UC_FIRMWARE_SELECTED); |
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| 82 | return intel_uc_fw_is_available(uc_fw: &gsc->fw); |
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| 83 | } |
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| 84 | |
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| 85 | #endif |
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| 86 | |
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