| 1 | /* SPDX-License-Identifier: MIT */ |
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| 2 | /* |
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| 3 | * Copyright © 2008-2018 Intel Corporation |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef I915_RESET_H |
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| 7 | #define I915_RESET_H |
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| 8 | |
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| 9 | #include <linux/compiler.h> |
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| 10 | #include <linux/types.h> |
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| 11 | #include <linux/srcu.h> |
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| 12 | |
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| 13 | #include "intel_engine_types.h" |
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| 14 | #include "intel_reset_types.h" |
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| 15 | |
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| 16 | struct i915_request; |
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| 17 | struct intel_engine_cs; |
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| 18 | struct intel_gt; |
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| 19 | struct intel_guc; |
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| 20 | |
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| 21 | void intel_gt_init_reset(struct intel_gt *gt); |
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| 22 | void intel_gt_fini_reset(struct intel_gt *gt); |
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| 23 | |
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| 24 | __printf(4, 5) |
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| 25 | void intel_gt_handle_error(struct intel_gt *gt, |
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| 26 | intel_engine_mask_t engine_mask, |
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| 27 | unsigned long flags, |
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| 28 | const char *fmt, ...); |
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| 29 | #define I915_ERROR_CAPTURE BIT(0) |
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| 30 | |
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| 31 | bool intel_gt_gpu_reset_clobbers_display(struct intel_gt *gt); |
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| 32 | |
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| 33 | void intel_gt_reset(struct intel_gt *gt, |
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| 34 | intel_engine_mask_t stalled_mask, |
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| 35 | const char *reason); |
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| 36 | int intel_engine_reset(struct intel_engine_cs *engine, |
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| 37 | const char *reason); |
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| 38 | int __intel_engine_reset_bh(struct intel_engine_cs *engine, |
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| 39 | const char *reason); |
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| 40 | |
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| 41 | void __i915_request_reset(struct i915_request *rq, bool guilty); |
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| 42 | |
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| 43 | int __must_check intel_gt_reset_trylock(struct intel_gt *gt, int *srcu); |
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| 44 | int __must_check intel_gt_reset_lock_interruptible(struct intel_gt *gt, int *srcu); |
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| 45 | void intel_gt_reset_unlock(struct intel_gt *gt, int tag); |
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| 46 | |
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| 47 | void intel_gt_set_wedged(struct intel_gt *gt); |
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| 48 | bool intel_gt_unset_wedged(struct intel_gt *gt); |
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| 49 | int intel_gt_terminally_wedged(struct intel_gt *gt); |
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| 50 | |
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| 51 | /* |
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| 52 | * There's no unset_wedged_on_init paired with this one. |
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| 53 | * Once we're wedged on init, there's no going back. |
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| 54 | * Same thing for unset_wedged_on_fini. |
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| 55 | */ |
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| 56 | void intel_gt_set_wedged_on_init(struct intel_gt *gt); |
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| 57 | void intel_gt_set_wedged_on_fini(struct intel_gt *gt); |
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| 58 | |
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| 59 | int intel_gt_reset_engine(struct intel_engine_cs *engine); |
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| 60 | int intel_gt_reset_all_engines(struct intel_gt *gt); |
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| 61 | |
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| 62 | int intel_reset_guc(struct intel_gt *gt); |
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| 63 | |
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| 64 | struct intel_wedge_me { |
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| 65 | struct delayed_work work; |
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| 66 | struct intel_gt *gt; |
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| 67 | const char *name; |
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| 68 | }; |
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| 69 | |
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| 70 | void __intel_init_wedge(struct intel_wedge_me *w, |
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| 71 | struct intel_gt *gt, |
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| 72 | long timeout, |
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| 73 | const char *name); |
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| 74 | void __intel_fini_wedge(struct intel_wedge_me *w); |
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| 75 | |
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| 76 | #define intel_wedge_on_timeout(W, GT, TIMEOUT) \ |
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| 77 | for (__intel_init_wedge((W), (GT), (TIMEOUT), __func__); \ |
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| 78 | (W)->gt; \ |
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| 79 | __intel_fini_wedge((W))) |
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| 80 | |
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| 81 | bool intel_has_gpu_reset(const struct intel_gt *gt); |
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| 82 | bool intel_has_reset_engine(const struct intel_gt *gt); |
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| 83 | |
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| 84 | bool intel_engine_reset_needs_wa_22011802037(struct intel_gt *gt); |
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| 85 | |
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| 86 | #endif /* I915_RESET_H */ |
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| 87 | |
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