| 1 | /* SPDX-License-Identifier: MIT */ |
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| 2 | /* |
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| 3 | * Copyright © 2019 Intel Corporation |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef __INTEL_CDCLK_H__ |
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| 7 | #define __INTEL_CDCLK_H__ |
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| 8 | |
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| 9 | #include <linux/types.h> |
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| 10 | |
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| 11 | enum pipe; |
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| 12 | struct intel_atomic_state; |
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| 13 | struct intel_cdclk_state; |
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| 14 | struct intel_crtc; |
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| 15 | struct intel_crtc_state; |
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| 16 | struct intel_display; |
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| 17 | |
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| 18 | struct intel_cdclk_config { |
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| 19 | unsigned int cdclk, vco, ref, bypass; |
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| 20 | u8 voltage_level; |
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| 21 | /* This field is only valid for Xe2LPD and above. */ |
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| 22 | bool joined_mbus; |
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| 23 | }; |
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| 24 | |
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| 25 | void intel_cdclk_init_hw(struct intel_display *display); |
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| 26 | void intel_cdclk_uninit_hw(struct intel_display *display); |
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| 27 | void intel_init_cdclk_hooks(struct intel_display *display); |
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| 28 | void intel_update_max_cdclk(struct intel_display *display); |
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| 29 | void intel_update_cdclk(struct intel_display *display); |
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| 30 | u32 intel_read_rawclk(struct intel_display *display); |
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| 31 | bool intel_cdclk_clock_changed(const struct intel_cdclk_config *a, |
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| 32 | const struct intel_cdclk_config *b); |
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| 33 | int intel_mdclk_cdclk_ratio(struct intel_display *display, |
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| 34 | const struct intel_cdclk_config *cdclk_config); |
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| 35 | bool intel_cdclk_is_decreasing_later(struct intel_atomic_state *state); |
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| 36 | void intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state); |
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| 37 | void intel_set_cdclk_post_plane_update(struct intel_atomic_state *state); |
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| 38 | void intel_cdclk_dump_config(struct intel_display *display, |
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| 39 | const struct intel_cdclk_config *cdclk_config, |
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| 40 | const char *context); |
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| 41 | void intel_cdclk_get_cdclk(struct intel_display *display, |
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| 42 | struct intel_cdclk_config *cdclk_config); |
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| 43 | int intel_cdclk_atomic_check(struct intel_atomic_state *state); |
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| 44 | int intel_cdclk_state_set_joined_mbus(struct intel_atomic_state *state, bool joined_mbus); |
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| 45 | struct intel_cdclk_state * |
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| 46 | intel_atomic_get_cdclk_state(struct intel_atomic_state *state); |
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| 47 | void intel_cdclk_update_hw_state(struct intel_display *display); |
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| 48 | void intel_cdclk_crtc_disable_noatomic(struct intel_crtc *crtc); |
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| 49 | int intel_cdclk_update_dbuf_bw_min_cdclk(struct intel_atomic_state *state, |
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| 50 | int old_min_cdclk, int new_min_cdclk, |
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| 51 | bool *need_cdclk_calc); |
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| 52 | |
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| 53 | #define to_intel_cdclk_state(global_state) \ |
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| 54 | container_of_const((global_state), struct intel_cdclk_state, base) |
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| 55 | |
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| 56 | #define intel_atomic_get_old_cdclk_state(state) \ |
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| 57 | to_intel_cdclk_state(intel_atomic_get_old_global_obj_state(state, &to_intel_display(state)->cdclk.obj)) |
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| 58 | #define intel_atomic_get_new_cdclk_state(state) \ |
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| 59 | to_intel_cdclk_state(intel_atomic_get_new_global_obj_state(state, &to_intel_display(state)->cdclk.obj)) |
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| 60 | |
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| 61 | int intel_cdclk_init(struct intel_display *display); |
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| 62 | void intel_cdclk_debugfs_register(struct intel_display *display); |
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| 63 | |
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| 64 | int intel_cdclk_logical(const struct intel_cdclk_state *cdclk_state); |
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| 65 | int intel_cdclk_actual(const struct intel_cdclk_state *cdclk_state); |
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| 66 | int intel_cdclk_actual_voltage_level(const struct intel_cdclk_state *cdclk_state); |
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| 67 | int intel_cdclk_min_cdclk(const struct intel_cdclk_state *cdclk_state, enum pipe pipe); |
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| 68 | bool intel_cdclk_pmdemand_needs_update(struct intel_atomic_state *state); |
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| 69 | void intel_cdclk_force_min_cdclk(struct intel_cdclk_state *cdclk_state, int force_min_cdclk); |
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| 70 | void intel_cdclk_read_hw(struct intel_display *display); |
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| 71 | |
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| 72 | unsigned int intel_cdclk_prefill_adjustment(const struct intel_crtc_state *crtc_state); |
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| 73 | unsigned int intel_cdclk_prefill_adjustment_worst(const struct intel_crtc_state *crtc_state); |
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| 74 | int intel_cdclk_min_cdclk_for_prefill(const struct intel_crtc_state *crtc_state, |
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| 75 | unsigned int prefill_lines_unadjusted, |
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| 76 | unsigned int prefill_lines_available); |
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| 77 | |
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| 78 | int intel_crtc_min_cdclk(const struct intel_crtc_state *crtc_state); |
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| 79 | |
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| 80 | #endif /* __INTEL_CDCLK_H__ */ |
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| 81 | |
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