1/*
2 * Copyright © 2007 Dave Mueller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Dave Mueller <dave.mueller@gmx.ch>
25 *
26 */
27
28#include <drm/drm_print.h>
29
30#include "intel_display_types.h"
31#include "intel_dvo_dev.h"
32
33/* register definitions according to the TFP410 data sheet */
34#define TFP410_VID 0x014C
35#define TFP410_DID 0x0410
36
37#define TFP410_VID_LO 0x00
38#define TFP410_VID_HI 0x01
39#define TFP410_DID_LO 0x02
40#define TFP410_DID_HI 0x03
41#define TFP410_REV 0x04
42
43#define TFP410_CTL_1 0x08
44#define TFP410_CTL_1_TDIS (1<<6)
45#define TFP410_CTL_1_VEN (1<<5)
46#define TFP410_CTL_1_HEN (1<<4)
47#define TFP410_CTL_1_DSEL (1<<3)
48#define TFP410_CTL_1_BSEL (1<<2)
49#define TFP410_CTL_1_EDGE (1<<1)
50#define TFP410_CTL_1_PD (1<<0)
51
52#define TFP410_CTL_2 0x09
53#define TFP410_CTL_2_VLOW (1<<7)
54#define TFP410_CTL_2_MSEL_MASK (0x7<<4)
55#define TFP410_CTL_2_MSEL (1<<4)
56#define TFP410_CTL_2_TSEL (1<<3)
57#define TFP410_CTL_2_RSEN (1<<2)
58#define TFP410_CTL_2_HTPLG (1<<1)
59#define TFP410_CTL_2_MDI (1<<0)
60
61#define TFP410_CTL_3 0x0A
62#define TFP410_CTL_3_DK_MASK (0x7<<5)
63#define TFP410_CTL_3_DK (1<<5)
64#define TFP410_CTL_3_DKEN (1<<4)
65#define TFP410_CTL_3_CTL_MASK (0x7<<1)
66#define TFP410_CTL_3_CTL (1<<1)
67
68#define TFP410_USERCFG 0x0B
69
70#define TFP410_DE_DLY 0x32
71
72#define TFP410_DE_CTL 0x33
73#define TFP410_DE_CTL_DEGEN (1<<6)
74#define TFP410_DE_CTL_VSPOL (1<<5)
75#define TFP410_DE_CTL_HSPOL (1<<4)
76#define TFP410_DE_CTL_DEDLY8 (1<<0)
77
78#define TFP410_DE_TOP 0x34
79
80#define TFP410_DE_CNT_LO 0x36
81#define TFP410_DE_CNT_HI 0x37
82
83#define TFP410_DE_LIN_LO 0x38
84#define TFP410_DE_LIN_HI 0x39
85
86#define TFP410_H_RES_LO 0x3A
87#define TFP410_H_RES_HI 0x3B
88
89#define TFP410_V_RES_LO 0x3C
90#define TFP410_V_RES_HI 0x3D
91
92struct tfp410_priv {
93 bool quiet;
94};
95
96static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, u8 *ch)
97{
98 struct tfp410_priv *tfp = dvo->dev_priv;
99 struct i2c_adapter *adapter = dvo->i2c_bus;
100 u8 out_buf[2];
101 u8 in_buf[2];
102
103 struct i2c_msg msgs[] = {
104 {
105 .addr = dvo->target_addr,
106 .flags = 0,
107 .len = 1,
108 .buf = out_buf,
109 },
110 {
111 .addr = dvo->target_addr,
112 .flags = I2C_M_RD,
113 .len = 1,
114 .buf = in_buf,
115 }
116 };
117
118 out_buf[0] = addr;
119 out_buf[1] = 0;
120
121 if (i2c_transfer(adap: adapter, msgs, num: 2) == 2) {
122 *ch = in_buf[0];
123 return true;
124 }
125
126 if (!tfp->quiet) {
127 DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
128 addr, adapter->name, dvo->target_addr);
129 }
130 return false;
131}
132
133static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, u8 ch)
134{
135 struct tfp410_priv *tfp = dvo->dev_priv;
136 struct i2c_adapter *adapter = dvo->i2c_bus;
137 u8 out_buf[2];
138 struct i2c_msg msg = {
139 .addr = dvo->target_addr,
140 .flags = 0,
141 .len = 2,
142 .buf = out_buf,
143 };
144
145 out_buf[0] = addr;
146 out_buf[1] = ch;
147
148 if (i2c_transfer(adap: adapter, msgs: &msg, num: 1) == 1)
149 return true;
150
151 if (!tfp->quiet) {
152 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
153 addr, adapter->name, dvo->target_addr);
154 }
155
156 return false;
157}
158
159static int tfp410_getid(struct intel_dvo_device *dvo, int addr)
160{
161 u8 ch1, ch2;
162
163 if (tfp410_readb(dvo, addr: addr+0, ch: &ch1) &&
164 tfp410_readb(dvo, addr: addr+1, ch: &ch2))
165 return ((ch2 << 8) & 0xFF00) | (ch1 & 0x00FF);
166
167 return -1;
168}
169
170/* Ti TFP410 driver for chip on i2c bus */
171static bool tfp410_init(struct intel_dvo_device *dvo,
172 struct i2c_adapter *adapter)
173{
174 /* this will detect the tfp410 chip on the specified i2c bus */
175 struct tfp410_priv *tfp;
176 int id;
177
178 tfp = kzalloc(sizeof(*tfp), GFP_KERNEL);
179 if (tfp == NULL)
180 return false;
181
182 dvo->i2c_bus = adapter;
183 dvo->dev_priv = tfp;
184 tfp->quiet = true;
185
186 if ((id = tfp410_getid(dvo, TFP410_VID_LO)) != TFP410_VID) {
187 DRM_DEBUG_KMS("tfp410 not detected got VID %X: from %s "
188 "Target %d.\n",
189 id, adapter->name, dvo->target_addr);
190 goto out;
191 }
192
193 if ((id = tfp410_getid(dvo, TFP410_DID_LO)) != TFP410_DID) {
194 DRM_DEBUG_KMS("tfp410 not detected got DID %X: from %s "
195 "Target %d.\n",
196 id, adapter->name, dvo->target_addr);
197 goto out;
198 }
199 tfp->quiet = false;
200 return true;
201out:
202 kfree(objp: tfp);
203 return false;
204}
205
206static enum drm_connector_status tfp410_detect(struct intel_dvo_device *dvo)
207{
208 enum drm_connector_status ret = connector_status_disconnected;
209 u8 ctl2;
210
211 if (tfp410_readb(dvo, TFP410_CTL_2, ch: &ctl2)) {
212 if (ctl2 & TFP410_CTL_2_RSEN)
213 ret = connector_status_connected;
214 else
215 ret = connector_status_disconnected;
216 }
217
218 return ret;
219}
220
221static enum drm_mode_status tfp410_mode_valid(struct intel_dvo_device *dvo,
222 const struct drm_display_mode *mode)
223{
224 return MODE_OK;
225}
226
227static void tfp410_mode_set(struct intel_dvo_device *dvo,
228 const struct drm_display_mode *mode,
229 const struct drm_display_mode *adjusted_mode)
230{
231 /* As long as the basics are set up, since we don't have clock dependencies
232 * in the mode setup, we can just leave the registers alone and everything
233 * will work fine.
234 */
235 /* don't do much */
236 return;
237}
238
239/* set the tfp410 power state */
240static void tfp410_dpms(struct intel_dvo_device *dvo, bool enable)
241{
242 u8 ctl1;
243
244 if (!tfp410_readb(dvo, TFP410_CTL_1, ch: &ctl1))
245 return;
246
247 if (enable)
248 ctl1 |= TFP410_CTL_1_PD;
249 else
250 ctl1 &= ~TFP410_CTL_1_PD;
251
252 tfp410_writeb(dvo, TFP410_CTL_1, ch: ctl1);
253}
254
255static bool tfp410_get_hw_state(struct intel_dvo_device *dvo)
256{
257 u8 ctl1;
258
259 if (!tfp410_readb(dvo, TFP410_CTL_1, ch: &ctl1))
260 return false;
261
262 if (ctl1 & TFP410_CTL_1_PD)
263 return true;
264 else
265 return false;
266}
267
268static void tfp410_dump_regs(struct intel_dvo_device *dvo)
269{
270 u8 val, val2;
271
272 tfp410_readb(dvo, TFP410_REV, ch: &val);
273 DRM_DEBUG_KMS("TFP410_REV: 0x%02X\n", val);
274 tfp410_readb(dvo, TFP410_CTL_1, ch: &val);
275 DRM_DEBUG_KMS("TFP410_CTL1: 0x%02X\n", val);
276 tfp410_readb(dvo, TFP410_CTL_2, ch: &val);
277 DRM_DEBUG_KMS("TFP410_CTL2: 0x%02X\n", val);
278 tfp410_readb(dvo, TFP410_CTL_3, ch: &val);
279 DRM_DEBUG_KMS("TFP410_CTL3: 0x%02X\n", val);
280 tfp410_readb(dvo, TFP410_USERCFG, ch: &val);
281 DRM_DEBUG_KMS("TFP410_USERCFG: 0x%02X\n", val);
282 tfp410_readb(dvo, TFP410_DE_DLY, ch: &val);
283 DRM_DEBUG_KMS("TFP410_DE_DLY: 0x%02X\n", val);
284 tfp410_readb(dvo, TFP410_DE_CTL, ch: &val);
285 DRM_DEBUG_KMS("TFP410_DE_CTL: 0x%02X\n", val);
286 tfp410_readb(dvo, TFP410_DE_TOP, ch: &val);
287 DRM_DEBUG_KMS("TFP410_DE_TOP: 0x%02X\n", val);
288 tfp410_readb(dvo, TFP410_DE_CNT_LO, ch: &val);
289 tfp410_readb(dvo, TFP410_DE_CNT_HI, ch: &val2);
290 DRM_DEBUG_KMS("TFP410_DE_CNT: 0x%02X%02X\n", val2, val);
291 tfp410_readb(dvo, TFP410_DE_LIN_LO, ch: &val);
292 tfp410_readb(dvo, TFP410_DE_LIN_HI, ch: &val2);
293 DRM_DEBUG_KMS("TFP410_DE_LIN: 0x%02X%02X\n", val2, val);
294 tfp410_readb(dvo, TFP410_H_RES_LO, ch: &val);
295 tfp410_readb(dvo, TFP410_H_RES_HI, ch: &val2);
296 DRM_DEBUG_KMS("TFP410_H_RES: 0x%02X%02X\n", val2, val);
297 tfp410_readb(dvo, TFP410_V_RES_LO, ch: &val);
298 tfp410_readb(dvo, TFP410_V_RES_HI, ch: &val2);
299 DRM_DEBUG_KMS("TFP410_V_RES: 0x%02X%02X\n", val2, val);
300}
301
302static void tfp410_destroy(struct intel_dvo_device *dvo)
303{
304 struct tfp410_priv *tfp = dvo->dev_priv;
305
306 if (tfp) {
307 kfree(objp: tfp);
308 dvo->dev_priv = NULL;
309 }
310}
311
312const struct intel_dvo_dev_ops tfp410_ops = {
313 .init = tfp410_init,
314 .detect = tfp410_detect,
315 .mode_valid = tfp410_mode_valid,
316 .mode_set = tfp410_mode_set,
317 .dpms = tfp410_dpms,
318 .get_hw_state = tfp410_get_hw_state,
319 .dump_regs = tfp410_dump_regs,
320 .destroy = tfp410_destroy,
321};
322

source code of linux/drivers/gpu/drm/i915/display/dvo_tfp410.c