1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright 2025 Advanced Micro Devices, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25#ifndef __RAS_SYS_H__
26#define __RAS_SYS_H__
27#include <linux/stdarg.h>
28#include <linux/printk.h>
29#include <linux/dev_printk.h>
30#include <linux/mempool.h>
31#include "amdgpu.h"
32
33#define RAS_DEV_ERR(device, fmt, ...) \
34 do { \
35 if (device) \
36 dev_err(((struct amdgpu_device *)device)->dev, fmt, ##__VA_ARGS__); \
37 else \
38 printk(KERN_ERR fmt, ##__VA_ARGS__); \
39 } while (0)
40
41#define RAS_DEV_WARN(device, fmt, ...) \
42 do { \
43 if (device) \
44 dev_warn(((struct amdgpu_device *)device)->dev, fmt, ##__VA_ARGS__); \
45 else \
46 printk(KERN_WARNING fmt, ##__VA_ARGS__); \
47 } while (0)
48
49#define RAS_DEV_INFO(device, fmt, ...) \
50 do { \
51 if (device) \
52 dev_info(((struct amdgpu_device *)device)->dev, fmt, ##__VA_ARGS__); \
53 else \
54 printk(KERN_INFO fmt, ##__VA_ARGS__); \
55 } while (0)
56
57#define RAS_DEV_DBG(device, fmt, ...) \
58 do { \
59 if (device) \
60 dev_dbg(((struct amdgpu_device *)device)->dev, fmt, ##__VA_ARGS__); \
61 else \
62 printk(KERN_DEBUG fmt, ##__VA_ARGS__); \
63 } while (0)
64
65#define RAS_INFO(fmt, ...) printk(KERN_INFO fmt, ##__VA_ARGS__)
66
67#define RAS_DEV_RREG32_SOC15(dev, ip, inst, reg) \
68({ \
69 struct amdgpu_device *adev = (struct amdgpu_device *)dev; \
70 __RREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg, \
71 0, ip##_HWIP, inst); \
72})
73
74#define RAS_DEV_WREG32_SOC15(dev, ip, inst, reg, value) \
75({ \
76 struct amdgpu_device *adev = (struct amdgpu_device *)dev; \
77 __WREG32_SOC15_RLC__((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg), \
78 value, 0, ip##_HWIP, inst); \
79})
80
81/* GET_INST returns the physical instance corresponding to a logical instance */
82#define RAS_GET_INST(dev, ip, inst) \
83({ \
84 struct amdgpu_device *adev = (struct amdgpu_device *)dev; \
85 adev->ip_map.logical_to_dev_inst ? \
86 adev->ip_map.logical_to_dev_inst(adev, ip##_HWIP, inst) : inst; \
87})
88
89#define RAS_GET_MASK(dev, ip, mask) \
90({ \
91 struct amdgpu_device *adev = (struct amdgpu_device *)dev; \
92 (adev->ip_map.logical_to_dev_mask ? \
93 adev->ip_map.logical_to_dev_mask(adev, ip##_HWIP, mask) : mask); \
94})
95
96static inline void *ras_radix_tree_delete_iter(struct radix_tree_root *root, void *iter)
97{
98 return radix_tree_delete(root, ((struct radix_tree_iter *)iter)->index);
99}
100
101static inline long ras_wait_event_interruptible_timeout(void *wq_head,
102 int (*condition)(void *param), void *param, unsigned int timeout)
103{
104 return wait_event_interruptible_timeout(*(wait_queue_head_t *)wq_head,
105 condition(param), timeout);
106}
107
108extern const struct ras_sys_func amdgpu_ras_sys_fn;
109
110#endif
111

source code of linux/drivers/gpu/drm/amd/ras/ras_mgr/ras_sys.h