| 1 | /* |
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| 2 | * |
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| 3 | * Copyright (C) 2016 Advanced Micro Devices, Inc. |
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| 4 | * |
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| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 6 | * copy of this software and associated documentation files (the "Software"), |
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| 7 | * to deal in the Software without restriction, including without limitation |
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| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 10 | * Software is furnished to do so, subject to the following conditions: |
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| 11 | * |
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| 12 | * The above copyright notice and this permission notice shall be included |
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| 13 | * in all copies or substantial portions of the Software. |
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| 14 | * |
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| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
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| 16 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 18 | * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN |
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| 19 | * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
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| 20 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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| 21 | */ |
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| 22 | |
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| 23 | #ifndef GFX_6_0_D_H |
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| 24 | #define GFX_6_0_D_H |
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| 25 | |
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| 26 | #define ixCLIPPER_DEBUG_REG00 0x0000 |
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| 27 | #define ixCLIPPER_DEBUG_REG01 0x0001 |
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| 28 | #define ixCLIPPER_DEBUG_REG02 0x0002 |
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| 29 | #define ixCLIPPER_DEBUG_REG03 0x0003 |
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| 30 | #define ixCLIPPER_DEBUG_REG04 0x0004 |
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| 31 | #define ixCLIPPER_DEBUG_REG05 0x0005 |
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| 32 | #define ixCLIPPER_DEBUG_REG06 0x0006 |
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| 33 | #define ixCLIPPER_DEBUG_REG07 0x0007 |
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| 34 | #define ixCLIPPER_DEBUG_REG08 0x0008 |
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| 35 | #define ixCLIPPER_DEBUG_REG09 0x0009 |
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| 36 | #define ixCLIPPER_DEBUG_REG10 0x000A |
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| 37 | #define ixCLIPPER_DEBUG_REG11 0x000B |
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| 38 | #define ixCLIPPER_DEBUG_REG12 0x000C |
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| 39 | #define ixCLIPPER_DEBUG_REG13 0x000D |
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| 40 | #define ixCLIPPER_DEBUG_REG14 0x000E |
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| 41 | #define ixCLIPPER_DEBUG_REG15 0x000F |
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| 42 | #define ixCLIPPER_DEBUG_REG16 0x0010 |
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| 43 | #define ixCLIPPER_DEBUG_REG17 0x0011 |
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| 44 | #define ixCLIPPER_DEBUG_REG18 0x0012 |
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| 45 | #define ixCLIPPER_DEBUG_REG19 0x0013 |
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| 46 | #define ixGDS_DEBUG_REG0 0x0000 |
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| 47 | #define ixGDS_DEBUG_REG1 0x0001 |
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| 48 | #define ixGDS_DEBUG_REG2 0x0002 |
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| 49 | #define ixGDS_DEBUG_REG3 0x0003 |
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| 50 | #define ixGDS_DEBUG_REG4 0x0004 |
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| 51 | #define ixGDS_DEBUG_REG5 0x0005 |
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| 52 | #define ixGDS_DEBUG_REG6 0x0006 |
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| 53 | #define ixIA_DEBUG_REG0 0x0000 |
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| 54 | #define ixIA_DEBUG_REG1 0x0001 |
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| 55 | #define ixIA_DEBUG_REG2 0x0002 |
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| 56 | #define ixIA_DEBUG_REG3 0x0003 |
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| 57 | #define ixIA_DEBUG_REG4 0x0004 |
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| 58 | #define ixIA_DEBUG_REG5 0x0005 |
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| 59 | #define ixIA_DEBUG_REG6 0x0006 |
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| 60 | #define ixIA_DEBUG_REG7 0x0007 |
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| 61 | #define ixIA_DEBUG_REG8 0x0008 |
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| 62 | #define ixIA_DEBUG_REG9 0x0009 |
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| 63 | #define ixPA_SC_DEBUG_REG0 0x0000 |
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| 64 | #define ixPA_SC_DEBUG_REG1 0x0001 |
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| 65 | #define ixSETUP_DEBUG_REG0 0x0018 |
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| 66 | #define ixSETUP_DEBUG_REG1 0x0019 |
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| 67 | #define ixSETUP_DEBUG_REG2 0x001A |
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| 68 | #define ixSETUP_DEBUG_REG3 0x001B |
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| 69 | #define ixSETUP_DEBUG_REG4 0x001C |
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| 70 | #define ixSETUP_DEBUG_REG5 0x001D |
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| 71 | #define ixSQ_DEBUG_CTRL_LOCAL 0x0009 |
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| 72 | #define ixSQ_DEBUG_STS_LOCAL 0x0008 |
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| 73 | #define ixSQ_INTERRUPT_WORD_AUTO 0x20C0 |
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| 74 | #define ixSQ_INTERRUPT_WORD_CMN 0x20C0 |
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| 75 | #define ixSQ_INTERRUPT_WORD_WAVE 0x20C0 |
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| 76 | #define ixSQ_WAVE_EXEC_HI 0x027F |
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| 77 | #define ixSQ_WAVE_EXEC_LO 0x027E |
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| 78 | #define ixSQ_WAVE_GPR_ALLOC 0x0015 |
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| 79 | #define ixSQ_WAVE_HW_ID 0x0014 |
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| 80 | #define ixSQ_WAVE_IB_DBG0 0x001C |
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| 81 | #define ixSQ_WAVE_IB_STS 0x0017 |
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| 82 | #define ixSQ_WAVE_INST_DW0 0x001A |
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| 83 | #define ixSQ_WAVE_INST_DW1 0x001B |
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| 84 | #define ixSQ_WAVE_LDS_ALLOC 0x0016 |
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| 85 | #define ixSQ_WAVE_M0 0x027C |
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| 86 | #define ixSQ_WAVE_MODE 0x0011 |
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| 87 | #define ixSQ_WAVE_PC_HI 0x0019 |
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| 88 | #define ixSQ_WAVE_PC_LO 0x0018 |
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| 89 | #define ixSQ_WAVE_STATUS 0x0012 |
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| 90 | #define ixSQ_WAVE_TBA_HI 0x026D |
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| 91 | #define ixSQ_WAVE_TBA_LO 0x026C |
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| 92 | #define ixSQ_WAVE_TMA_HI 0x026F |
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| 93 | #define ixSQ_WAVE_TMA_LO 0x026E |
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| 94 | #define ixSQ_WAVE_TRAPSTS 0x0013 |
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| 95 | #define ixSQ_WAVE_TTMP0 0x0270 |
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| 96 | #define ixSQ_WAVE_TTMP10 0x027A |
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| 97 | #define ixSQ_WAVE_TTMP1 0x0271 |
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| 98 | #define ixSQ_WAVE_TTMP11 0x027B |
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| 99 | #define ixSQ_WAVE_TTMP2 0x0272 |
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| 100 | #define ixSQ_WAVE_TTMP3 0x0273 |
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| 101 | #define ixSQ_WAVE_TTMP4 0x0274 |
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| 102 | #define ixSQ_WAVE_TTMP5 0x0275 |
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| 103 | #define ixSQ_WAVE_TTMP6 0x0276 |
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| 104 | #define ixSQ_WAVE_TTMP7 0x0277 |
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| 105 | #define ixSQ_WAVE_TTMP8 0x0278 |
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| 106 | #define ixSQ_WAVE_TTMP9 0x0279 |
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| 107 | #define ixSXIFCCG_DEBUG_REG0 0x0014 |
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| 108 | #define ixSXIFCCG_DEBUG_REG1 0x0015 |
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| 109 | #define ixSXIFCCG_DEBUG_REG2 0x0016 |
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| 110 | #define ixSXIFCCG_DEBUG_REG3 0x0017 |
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| 111 | #define ixVGT_DEBUG_REG0 0x0000 |
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| 112 | #define ixVGT_DEBUG_REG10 0x000A |
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| 113 | #define ixVGT_DEBUG_REG1 0x0001 |
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| 114 | #define ixVGT_DEBUG_REG11 0x000B |
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| 115 | #define ixVGT_DEBUG_REG12 0x000C |
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| 116 | #define ixVGT_DEBUG_REG13 0x000D |
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| 117 | #define ixVGT_DEBUG_REG14 0x000E |
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| 118 | #define ixVGT_DEBUG_REG15 0x000F |
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| 119 | #define ixVGT_DEBUG_REG16 0x0010 |
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| 120 | #define ixVGT_DEBUG_REG17 0x0011 |
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| 121 | #define ixVGT_DEBUG_REG18 0x0012 |
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| 122 | #define ixVGT_DEBUG_REG19 0x0013 |
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| 123 | #define ixVGT_DEBUG_REG20 0x0014 |
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| 124 | #define ixVGT_DEBUG_REG2 0x0002 |
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| 125 | #define ixVGT_DEBUG_REG21 0x0015 |
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| 126 | #define ixVGT_DEBUG_REG22 0x0016 |
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| 127 | #define ixVGT_DEBUG_REG23 0x0017 |
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| 128 | #define ixVGT_DEBUG_REG24 0x0018 |
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| 129 | #define ixVGT_DEBUG_REG25 0x0019 |
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| 130 | #define ixVGT_DEBUG_REG26 0x001A |
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| 131 | #define ixVGT_DEBUG_REG27 0x001B |
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| 132 | #define ixVGT_DEBUG_REG28 0x001C |
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| 133 | #define ixVGT_DEBUG_REG29 0x001D |
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| 134 | #define ixVGT_DEBUG_REG30 0x001E |
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| 135 | #define ixVGT_DEBUG_REG3 0x0003 |
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| 136 | #define ixVGT_DEBUG_REG31 0x001F |
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| 137 | #define ixVGT_DEBUG_REG32 0x0020 |
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| 138 | #define ixVGT_DEBUG_REG33 0x0021 |
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| 139 | #define ixVGT_DEBUG_REG34 0x0022 |
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| 140 | #define ixVGT_DEBUG_REG35 0x0023 |
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| 141 | #define ixVGT_DEBUG_REG36 0x0024 |
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| 142 | #define ixVGT_DEBUG_REG4 0x0004 |
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| 143 | #define ixVGT_DEBUG_REG5 0x0005 |
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| 144 | #define ixVGT_DEBUG_REG6 0x0006 |
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| 145 | #define ixVGT_DEBUG_REG7 0x0007 |
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| 146 | #define ixVGT_DEBUG_REG8 0x0008 |
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| 147 | #define ixVGT_DEBUG_REG9 0x0009 |
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| 148 | #define mmBCI_DEBUG_READ 0x24E3 |
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| 149 | #define mmCB_BLEND0_CONTROL 0xA1E0 |
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| 150 | #define mmCB_BLEND1_CONTROL 0xA1E1 |
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| 151 | #define mmCB_BLEND2_CONTROL 0xA1E2 |
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| 152 | #define mmCB_BLEND3_CONTROL 0xA1E3 |
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| 153 | #define mmCB_BLEND4_CONTROL 0xA1E4 |
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| 154 | #define mmCB_BLEND5_CONTROL 0xA1E5 |
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| 155 | #define mmCB_BLEND6_CONTROL 0xA1E6 |
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| 156 | #define mmCB_BLEND7_CONTROL 0xA1E7 |
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| 157 | #define mmCB_BLEND_ALPHA 0xA108 |
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| 158 | #define mmCB_BLEND_BLUE 0xA107 |
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| 159 | #define mmCB_BLEND_GREEN 0xA106 |
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| 160 | #define mmCB_BLEND_RED 0xA105 |
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| 161 | #define mmCB_CGTT_SCLK_CTRL 0x2698 |
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| 162 | #define mmCB_COLOR0_ATTRIB 0xA31D |
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| 163 | #define mmCB_COLOR0_BASE 0xA318 |
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| 164 | #define mmCB_COLOR0_CLEAR_WORD0 0xA323 |
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| 165 | #define mmCB_COLOR0_CLEAR_WORD1 0xA324 |
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| 166 | #define mmCB_COLOR0_CMASK 0xA31F |
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| 167 | #define mmCB_COLOR0_CMASK_SLICE 0xA320 |
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| 168 | #define mmCB_COLOR0_FMASK 0xA321 |
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| 169 | #define mmCB_COLOR0_FMASK_SLICE 0xA322 |
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| 170 | #define mmCB_COLOR0_INFO 0xA31C |
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| 171 | #define mmCB_COLOR0_PITCH 0xA319 |
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| 172 | #define mmCB_COLOR0_SLICE 0xA31A |
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| 173 | #define mmCB_COLOR0_VIEW 0xA31B |
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| 174 | #define mmCB_COLOR1_ATTRIB 0xA32C |
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| 175 | #define mmCB_COLOR1_BASE 0xA327 |
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| 176 | #define mmCB_COLOR1_CLEAR_WORD0 0xA332 |
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| 177 | #define mmCB_COLOR1_CLEAR_WORD1 0xA333 |
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| 178 | #define mmCB_COLOR1_CMASK 0xA32E |
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| 179 | #define mmCB_COLOR1_CMASK_SLICE 0xA32F |
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| 180 | #define mmCB_COLOR1_FMASK 0xA330 |
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| 181 | #define mmCB_COLOR1_FMASK_SLICE 0xA331 |
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| 182 | #define mmCB_COLOR1_INFO 0xA32B |
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| 183 | #define mmCB_COLOR1_PITCH 0xA328 |
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| 184 | #define mmCB_COLOR1_SLICE 0xA329 |
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| 185 | #define mmCB_COLOR1_VIEW 0xA32A |
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| 186 | #define mmCB_COLOR2_ATTRIB 0xA33B |
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| 187 | #define mmCB_COLOR2_BASE 0xA336 |
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| 188 | #define mmCB_COLOR2_CLEAR_WORD0 0xA341 |
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| 189 | #define mmCB_COLOR2_CLEAR_WORD1 0xA342 |
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| 190 | #define mmCB_COLOR2_CMASK 0xA33D |
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| 191 | #define mmCB_COLOR2_CMASK_SLICE 0xA33E |
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| 192 | #define mmCB_COLOR2_FMASK 0xA33F |
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| 193 | #define mmCB_COLOR2_FMASK_SLICE 0xA340 |
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| 194 | #define mmCB_COLOR2_INFO 0xA33A |
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| 195 | #define mmCB_COLOR2_PITCH 0xA337 |
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| 196 | #define mmCB_COLOR2_SLICE 0xA338 |
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| 197 | #define mmCB_COLOR2_VIEW 0xA339 |
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| 198 | #define mmCB_COLOR3_ATTRIB 0xA34A |
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| 199 | #define mmCB_COLOR3_BASE 0xA345 |
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| 200 | #define mmCB_COLOR3_CLEAR_WORD0 0xA350 |
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| 201 | #define mmCB_COLOR3_CLEAR_WORD1 0xA351 |
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| 202 | #define mmCB_COLOR3_CMASK 0xA34C |
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| 203 | #define mmCB_COLOR3_CMASK_SLICE 0xA34D |
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| 204 | #define mmCB_COLOR3_FMASK 0xA34E |
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| 205 | #define mmCB_COLOR3_FMASK_SLICE 0xA34F |
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| 206 | #define mmCB_COLOR3_INFO 0xA349 |
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| 207 | #define mmCB_COLOR3_PITCH 0xA346 |
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| 208 | #define mmCB_COLOR3_SLICE 0xA347 |
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| 209 | #define mmCB_COLOR3_VIEW 0xA348 |
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| 210 | #define mmCB_COLOR4_ATTRIB 0xA359 |
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| 211 | #define mmCB_COLOR4_BASE 0xA354 |
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| 212 | #define mmCB_COLOR4_CLEAR_WORD0 0xA35F |
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| 213 | #define mmCB_COLOR4_CLEAR_WORD1 0xA360 |
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| 214 | #define mmCB_COLOR4_CMASK 0xA35B |
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| 215 | #define mmCB_COLOR4_CMASK_SLICE 0xA35C |
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| 216 | #define mmCB_COLOR4_FMASK 0xA35D |
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| 217 | #define mmCB_COLOR4_FMASK_SLICE 0xA35E |
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| 218 | #define mmCB_COLOR4_INFO 0xA358 |
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| 219 | #define mmCB_COLOR4_PITCH 0xA355 |
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| 220 | #define mmCB_COLOR4_SLICE 0xA356 |
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| 221 | #define mmCB_COLOR4_VIEW 0xA357 |
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| 222 | #define mmCB_COLOR5_ATTRIB 0xA368 |
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| 223 | #define mmCB_COLOR5_BASE 0xA363 |
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| 224 | #define mmCB_COLOR5_CLEAR_WORD0 0xA36E |
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| 225 | #define mmCB_COLOR5_CLEAR_WORD1 0xA36F |
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| 226 | #define mmCB_COLOR5_CMASK 0xA36A |
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| 227 | #define mmCB_COLOR5_CMASK_SLICE 0xA36B |
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| 228 | #define mmCB_COLOR5_FMASK 0xA36C |
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| 229 | #define mmCB_COLOR5_FMASK_SLICE 0xA36D |
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| 230 | #define mmCB_COLOR5_INFO 0xA367 |
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| 231 | #define mmCB_COLOR5_PITCH 0xA364 |
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| 232 | #define mmCB_COLOR5_SLICE 0xA365 |
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| 233 | #define mmCB_COLOR5_VIEW 0xA366 |
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| 234 | #define mmCB_COLOR6_ATTRIB 0xA377 |
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| 235 | #define mmCB_COLOR6_BASE 0xA372 |
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| 236 | #define mmCB_COLOR6_CLEAR_WORD0 0xA37D |
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| 237 | #define mmCB_COLOR6_CLEAR_WORD1 0xA37E |
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| 238 | #define mmCB_COLOR6_CMASK 0xA379 |
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| 239 | #define mmCB_COLOR6_CMASK_SLICE 0xA37A |
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| 240 | #define mmCB_COLOR6_FMASK 0xA37B |
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| 241 | #define mmCB_COLOR6_FMASK_SLICE 0xA37C |
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| 242 | #define mmCB_COLOR6_INFO 0xA376 |
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| 243 | #define mmCB_COLOR6_PITCH 0xA373 |
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| 244 | #define mmCB_COLOR6_SLICE 0xA374 |
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| 245 | #define mmCB_COLOR6_VIEW 0xA375 |
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| 246 | #define mmCB_COLOR7_ATTRIB 0xA386 |
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| 247 | #define mmCB_COLOR7_BASE 0xA381 |
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| 248 | #define mmCB_COLOR7_CLEAR_WORD0 0xA38C |
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| 249 | #define mmCB_COLOR7_CLEAR_WORD1 0xA38D |
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| 250 | #define mmCB_COLOR7_CMASK 0xA388 |
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| 251 | #define mmCB_COLOR7_CMASK_SLICE 0xA389 |
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| 252 | #define mmCB_COLOR7_FMASK 0xA38A |
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| 253 | #define mmCB_COLOR7_FMASK_SLICE 0xA38B |
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| 254 | #define mmCB_COLOR7_INFO 0xA385 |
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| 255 | #define mmCB_COLOR7_PITCH 0xA382 |
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| 256 | #define mmCB_COLOR7_SLICE 0xA383 |
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| 257 | #define mmCB_COLOR7_VIEW 0xA384 |
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| 258 | #define mmCB_COLOR_CONTROL 0xA202 |
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| 259 | #define mmCB_DEBUG_BUS_10 0x26A2 |
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| 260 | #define mmCB_DEBUG_BUS_1 0x2699 |
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| 261 | #define mmCB_DEBUG_BUS_11 0x26A3 |
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| 262 | #define mmCB_DEBUG_BUS_12 0x26A4 |
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| 263 | #define mmCB_DEBUG_BUS_13 0x26A5 |
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| 264 | #define mmCB_DEBUG_BUS_14 0x26A6 |
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| 265 | #define mmCB_DEBUG_BUS_15 0x26A7 |
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| 266 | #define mmCB_DEBUG_BUS_16 0x26A8 |
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| 267 | #define mmCB_DEBUG_BUS_17 0x26A9 |
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| 268 | #define mmCB_DEBUG_BUS_18 0x26AA |
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| 269 | #define mmCB_DEBUG_BUS_2 0x269A |
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| 270 | #define mmCB_DEBUG_BUS_3 0x269B |
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| 271 | #define mmCB_DEBUG_BUS_4 0x269C |
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| 272 | #define mmCB_DEBUG_BUS_5 0x269D |
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| 273 | #define mmCB_DEBUG_BUS_6 0x269E |
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| 274 | #define mmCB_DEBUG_BUS_7 0x269F |
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| 275 | #define mmCB_DEBUG_BUS_8 0x26A0 |
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| 276 | #define mmCB_DEBUG_BUS_9 0x26A1 |
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| 277 | #define mmCB_HW_CONTROL 0x2684 |
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| 278 | #define mmCB_HW_CONTROL_1 0x2685 |
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| 279 | #define mmCB_HW_CONTROL_2 0x2686 |
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| 280 | #define mmCB_PERFCOUNTER0_HI 0x2691 |
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| 281 | #define mmCB_PERFCOUNTER0_LO 0x2690 |
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| 282 | #define mmCB_PERFCOUNTER0_SELECT1 0x2689 |
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| 283 | #define mmCB_PERFCOUNTER1_HI 0x2693 |
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| 284 | #define mmCB_PERFCOUNTER1_LO 0x2692 |
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| 285 | #define mmCB_PERFCOUNTER2_HI 0x2695 |
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| 286 | #define mmCB_PERFCOUNTER2_LO 0x2694 |
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| 287 | #define mmCB_PERFCOUNTER3_HI 0x2697 |
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| 288 | #define mmCB_PERFCOUNTER3_LO 0x2696 |
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| 289 | #define mmCB_SHADER_MASK 0xA08F |
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| 290 | #define mmCB_TARGET_MASK 0xA08E |
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| 291 | #define mmCC_GC_SHADER_ARRAY_CONFIG 0x226F |
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| 292 | #define mmCC_RB_BACKEND_DISABLE 0x263D |
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| 293 | #define mmCC_RB_DAISY_CHAIN 0x2641 |
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| 294 | #define mmCC_RB_REDUNDANCY 0x263C |
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| 295 | #define mmCC_SQC_BANK_DISABLE 0x2307 |
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| 296 | #define mmCGTS_RD_CTRL_REG 0x2455 |
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| 297 | #define mmCGTS_RD_REG 0x2456 |
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| 298 | #define mmCGTS_SM_CTRL_REG 0x2454 |
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| 299 | #define mmCGTS_TCC_DISABLE 0x2452 |
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| 300 | #define mmCGTS_USER_TCC_DISABLE 0x2453 |
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| 301 | #define mmCGTT_BCI_CLK_CTRL 0x24A9 |
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| 302 | #define mmCGTT_CP_CLK_CTRL 0x3059 |
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| 303 | #define mmCGTT_GDS_CLK_CTRL 0x25DD |
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| 304 | #define mmCGTT_IA_CLK_CTRL 0x2261 |
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| 305 | #define mmCGTT_PA_CLK_CTRL 0x2286 |
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| 306 | #define mmCGTT_PC_CLK_CTRL 0x24A8 |
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| 307 | #define mmCGTT_RLC_CLK_CTRL 0x30E0 |
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| 308 | #define mmCGTT_SC_CLK_CTRL 0x22CA |
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| 309 | #define mmCGTT_SPI_CLK_CTRL 0x2451 |
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| 310 | #define mmCGTT_SQ_CLK_CTRL 0x2362 |
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| 311 | #define mmCGTT_SQG_CLK_CTRL 0x2363 |
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| 312 | #define mmCGTT_SX_CLK_CTRL0 0x240C |
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| 313 | #define mmCGTT_SX_CLK_CTRL1 0x240D |
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| 314 | #define mmCGTT_SX_CLK_CTRL2 0x240E |
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| 315 | #define mmCGTT_SX_CLK_CTRL3 0x240F |
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| 316 | #define mmCGTT_SX_CLK_CTRL4 0x2410 |
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| 317 | #define mmCGTT_TCI_CLK_CTRL 0x2B60 |
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| 318 | #define mmCGTT_TCP_CLK_CTRL 0x2B15 |
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| 319 | #define mmCGTT_VGT_CLK_CTRL 0x225F |
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| 320 | #define mmCOHER_DEST_BASE_0 0xA092 |
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| 321 | #define mmCOHER_DEST_BASE_1 0xA093 |
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| 322 | #define mmCOHER_DEST_BASE_2 0xA07E |
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| 323 | #define mmCOHER_DEST_BASE_3 0xA07F |
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| 324 | #define mmCOMPUTE_DIM_X 0x2E01 |
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| 325 | #define mmCOMPUTE_DIM_Y 0x2E02 |
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| 326 | #define mmCOMPUTE_DIM_Z 0x2E03 |
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| 327 | #define mmCOMPUTE_DISPATCH_INITIATOR 0x2E00 |
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| 328 | #define mmCOMPUTE_NUM_THREAD_X 0x2E07 |
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| 329 | #define mmCOMPUTE_NUM_THREAD_Y 0x2E08 |
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| 330 | #define mmCOMPUTE_NUM_THREAD_Z 0x2E09 |
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| 331 | #define mmCOMPUTE_PGM_HI 0x2E0D |
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| 332 | #define mmCOMPUTE_PGM_LO 0x2E0C |
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| 333 | #define mmCOMPUTE_PGM_RSRC1 0x2E12 |
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| 334 | #define mmCOMPUTE_PGM_RSRC2 0x2E13 |
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| 335 | #define mmCOMPUTE_RESOURCE_LIMITS 0x2E15 |
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| 336 | #define mmCOMPUTE_START_X 0x2E04 |
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| 337 | #define mmCOMPUTE_START_Y 0x2E05 |
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| 338 | #define mmCOMPUTE_START_Z 0x2E06 |
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| 339 | #define mmCOMPUTE_STATIC_THREAD_MGMT_SE0 0x2E16 |
|---|
| 340 | #define mmCOMPUTE_STATIC_THREAD_MGMT_SE1 0x2E17 |
|---|
| 341 | #define mmCOMPUTE_TBA_HI 0x2E0F |
|---|
| 342 | #define mmCOMPUTE_TBA_LO 0x2E0E |
|---|
| 343 | #define mmCOMPUTE_TMA_HI 0x2E11 |
|---|
| 344 | #define mmCOMPUTE_TMA_LO 0x2E10 |
|---|
| 345 | #define mmCOMPUTE_TMPRING_SIZE 0x2E18 |
|---|
| 346 | #define mmCOMPUTE_USER_DATA_0 0x2E40 |
|---|
| 347 | #define mmCOMPUTE_USER_DATA_10 0x2E4A |
|---|
| 348 | #define mmCOMPUTE_USER_DATA_1 0x2E41 |
|---|
| 349 | #define mmCOMPUTE_USER_DATA_11 0x2E4B |
|---|
| 350 | #define mmCOMPUTE_USER_DATA_12 0x2E4C |
|---|
| 351 | #define mmCOMPUTE_USER_DATA_13 0x2E4D |
|---|
| 352 | #define mmCOMPUTE_USER_DATA_14 0x2E4E |
|---|
| 353 | #define mmCOMPUTE_USER_DATA_15 0x2E4F |
|---|
| 354 | #define mmCOMPUTE_USER_DATA_2 0x2E42 |
|---|
| 355 | #define mmCOMPUTE_USER_DATA_3 0x2E43 |
|---|
| 356 | #define mmCOMPUTE_USER_DATA_4 0x2E44 |
|---|
| 357 | #define mmCOMPUTE_USER_DATA_5 0x2E45 |
|---|
| 358 | #define mmCOMPUTE_USER_DATA_6 0x2E46 |
|---|
| 359 | #define mmCOMPUTE_USER_DATA_7 0x2E47 |
|---|
| 360 | #define mmCOMPUTE_USER_DATA_8 0x2E48 |
|---|
| 361 | #define mmCOMPUTE_USER_DATA_9 0x2E49 |
|---|
| 362 | #define mmCOMPUTE_VMID 0x2E14 |
|---|
| 363 | #define mmCP_APPEND_ADDR_HI 0x2159 |
|---|
| 364 | #define mmCP_APPEND_ADDR_LO 0x2158 |
|---|
| 365 | #define mmCP_APPEND_DATA 0x215A |
|---|
| 366 | #define mmCP_APPEND_LAST_CS_FENCE 0x215B |
|---|
| 367 | #define mmCP_APPEND_LAST_PS_FENCE 0x215C |
|---|
| 368 | #define mmCP_ATOMIC_PREOP_HI 0x215E |
|---|
| 369 | #define mmCP_ATOMIC_PREOP_LO 0x215D |
|---|
| 370 | #define mmCP_BUSY_STAT 0x219F |
|---|
| 371 | #define 0x21A4 |
|---|
| 372 | #define mmCP_CE_IB1_BASE_HI 0x21C7 |
|---|
| 373 | #define mmCP_CE_IB1_BASE_LO 0x21C6 |
|---|
| 374 | #define mmCP_CE_IB1_BUFSZ 0x21C8 |
|---|
| 375 | #define mmCP_CE_IB2_BASE_HI 0x21CA |
|---|
| 376 | #define mmCP_CE_IB2_BASE_LO 0x21C9 |
|---|
| 377 | #define mmCP_CE_IB2_BUFSZ 0x21CB |
|---|
| 378 | #define mmCP_CE_INIT_BASE_HI 0x21C4 |
|---|
| 379 | #define mmCP_CE_INIT_BASE_LO 0x21C3 |
|---|
| 380 | #define mmCP_CE_INIT_BUFSZ 0x21C5 |
|---|
| 381 | #define mmCP_CEQ1_AVAIL 0x21E6 |
|---|
| 382 | #define mmCP_CEQ2_AVAIL 0x21E7 |
|---|
| 383 | #define mmCP_CE_ROQ_IB1_STAT 0x21E9 |
|---|
| 384 | #define mmCP_CE_ROQ_IB2_STAT 0x21EA |
|---|
| 385 | #define mmCP_CE_ROQ_RB_STAT 0x21E8 |
|---|
| 386 | #define mmCP_CE_UCODE_ADDR 0x305A |
|---|
| 387 | #define mmCP_CE_UCODE_DATA 0x305B |
|---|
| 388 | #define mmCP_CMD_DATA 0x21DF |
|---|
| 389 | #define mmCP_CMD_INDEX 0x21DE |
|---|
| 390 | #define mmCP_CNTX_STAT 0x21B8 |
|---|
| 391 | #define mmCP_COHER_BASE 0x217E |
|---|
| 392 | #define mmCP_COHER_CNTL 0x217C |
|---|
| 393 | #define mmCP_COHER_SIZE 0x217D |
|---|
| 394 | #define mmCP_COHER_START_DELAY 0x217B |
|---|
| 395 | #define mmCP_COHER_STATUS 0x217F |
|---|
| 396 | #define mmCP_CSF_CNTL 0x21B5 |
|---|
| 397 | #define mmCP_CSF_STAT 0x21B4 |
|---|
| 398 | #define mmCP_DMA_CNTL 0x218A |
|---|
| 399 | #define mmCP_DMA_ME_COMMAND 0x2184 |
|---|
| 400 | #define mmCP_DMA_ME_DST_ADDR 0x2182 |
|---|
| 401 | #define mmCP_DMA_ME_DST_ADDR_HI 0x2183 |
|---|
| 402 | #define mmCP_DMA_ME_SRC_ADDR 0x2180 |
|---|
| 403 | #define mmCP_DMA_ME_SRC_ADDR_HI 0x2181 |
|---|
| 404 | #define mmCP_DMA_PFP_COMMAND 0x2189 |
|---|
| 405 | #define mmCP_DMA_PFP_DST_ADDR 0x2187 |
|---|
| 406 | #define mmCP_DMA_PFP_DST_ADDR_HI 0x2188 |
|---|
| 407 | #define mmCP_DMA_PFP_SRC_ADDR 0x2185 |
|---|
| 408 | #define mmCP_DMA_PFP_SRC_ADDR_HI 0x2186 |
|---|
| 409 | #define mmCP_DMA_READ_TAGS 0x218B |
|---|
| 410 | #define mmCP_ECC_FIRSTOCCURRENCE 0x307A |
|---|
| 411 | #define mmCP_ECC_FIRSTOCCURRENCE_RING0 0x307B |
|---|
| 412 | #define mmCP_ECC_FIRSTOCCURRENCE_RING1 0x307C |
|---|
| 413 | #define mmCP_ECC_FIRSTOCCURRENCE_RING2 0x307D |
|---|
| 414 | #define mmCP_EOP_DONE_ADDR_HI 0x2101 |
|---|
| 415 | #define mmCP_EOP_DONE_ADDR_LO 0x2100 |
|---|
| 416 | #define mmCP_EOP_DONE_DATA_HI 0x2103 |
|---|
| 417 | #define mmCP_EOP_DONE_DATA_LO 0x2102 |
|---|
| 418 | #define mmCP_EOP_LAST_FENCE_HI 0x2105 |
|---|
| 419 | #define mmCP_EOP_LAST_FENCE_LO 0x2104 |
|---|
| 420 | #define mmCP_GDS_ATOMIC0_PREOP_HI 0x2160 |
|---|
| 421 | #define mmCP_GDS_ATOMIC0_PREOP_LO 0x215F |
|---|
| 422 | #define mmCP_GDS_ATOMIC1_PREOP_HI 0x2162 |
|---|
| 423 | #define mmCP_GDS_ATOMIC1_PREOP_LO 0x2161 |
|---|
| 424 | #define mmCP_GRBM_FREE_COUNT 0x21A3 |
|---|
| 425 | #define mmCP_IB1_BASE_HI 0x21CD |
|---|
| 426 | #define mmCP_IB1_BASE_LO 0x21CC |
|---|
| 427 | #define mmCP_IB1_BUFSZ 0x21CE |
|---|
| 428 | #define mmCP_IB1_OFFSET 0x2192 |
|---|
| 429 | #define mmCP_IB1_PREAMBLE_BEGIN 0x2194 |
|---|
| 430 | #define mmCP_IB1_PREAMBLE_END 0x2195 |
|---|
| 431 | #define mmCP_IB2_BASE_HI 0x21D0 |
|---|
| 432 | #define mmCP_IB2_BASE_LO 0x21CF |
|---|
| 433 | #define mmCP_IB2_BUFSZ 0x21D1 |
|---|
| 434 | #define mmCP_IB2_OFFSET 0x2193 |
|---|
| 435 | #define mmCP_IB2_PREAMBLE_BEGIN 0x2196 |
|---|
| 436 | #define mmCP_IB2_PREAMBLE_END 0x2197 |
|---|
| 437 | #define mmCP_INT_CNTL 0x3049 |
|---|
| 438 | #define mmCP_INT_CNTL_RING0 0x306A |
|---|
| 439 | #define mmCP_INT_CNTL_RING1 0x306B |
|---|
| 440 | #define mmCP_INT_CNTL_RING2 0x306C |
|---|
| 441 | #define mmCP_INT_STAT_DEBUG 0x21F7 |
|---|
| 442 | #define mmCP_INT_STATUS 0x304A |
|---|
| 443 | #define mmCP_INT_STATUS_RING0 0x306D |
|---|
| 444 | #define mmCP_INT_STATUS_RING1 0x306E |
|---|
| 445 | #define mmCP_INT_STATUS_RING2 0x306F |
|---|
| 446 | #define mmCP_MC_PACK_DELAY_CNT 0x21A7 |
|---|
| 447 | #define mmCP_ME_CNTL 0x21B6 |
|---|
| 448 | #define 0x21A1 |
|---|
| 449 | #define mmCP_ME_MC_RADDR_HI 0x216E |
|---|
| 450 | #define mmCP_ME_MC_RADDR_LO 0x216D |
|---|
| 451 | #define mmCP_ME_MC_WADDR_HI 0x216A |
|---|
| 452 | #define mmCP_ME_MC_WADDR_LO 0x2169 |
|---|
| 453 | #define mmCP_ME_MC_WDATA_HI 0x216C |
|---|
| 454 | #define mmCP_ME_MC_WDATA_LO 0x216B |
|---|
| 455 | #define mmCP_MEM_SLP_CNTL 0x3079 |
|---|
| 456 | #define mmCP_ME_PREEMPTION 0x21B9 |
|---|
| 457 | #define mmCP_MEQ_AVAIL 0x21DD |
|---|
| 458 | #define mmCP_MEQ_STAT 0x21E5 |
|---|
| 459 | #define mmCP_MEQ_THRESHOLDS 0x21D9 |
|---|
| 460 | #define mmCP_ME_RAM_DATA 0x3058 |
|---|
| 461 | #define mmCP_ME_RAM_RADDR 0x3056 |
|---|
| 462 | #define mmCP_ME_RAM_WADDR 0x3057 |
|---|
| 463 | #define mmCP_NUM_PRIM_NEEDED_COUNT0_HI 0x210B |
|---|
| 464 | #define mmCP_NUM_PRIM_NEEDED_COUNT0_LO 0x210A |
|---|
| 465 | #define mmCP_NUM_PRIM_NEEDED_COUNT1_HI 0x210F |
|---|
| 466 | #define mmCP_NUM_PRIM_NEEDED_COUNT1_LO 0x210E |
|---|
| 467 | #define mmCP_NUM_PRIM_NEEDED_COUNT2_HI 0x2113 |
|---|
| 468 | #define mmCP_NUM_PRIM_NEEDED_COUNT2_LO 0x2112 |
|---|
| 469 | #define mmCP_NUM_PRIM_NEEDED_COUNT3_HI 0x2117 |
|---|
| 470 | #define mmCP_NUM_PRIM_NEEDED_COUNT3_LO 0x2116 |
|---|
| 471 | #define mmCP_NUM_PRIM_WRITTEN_COUNT0_HI 0x2109 |
|---|
| 472 | #define mmCP_NUM_PRIM_WRITTEN_COUNT0_LO 0x2108 |
|---|
| 473 | #define mmCP_NUM_PRIM_WRITTEN_COUNT1_HI 0x210D |
|---|
| 474 | #define mmCP_NUM_PRIM_WRITTEN_COUNT1_LO 0x210C |
|---|
| 475 | #define mmCP_NUM_PRIM_WRITTEN_COUNT2_HI 0x2111 |
|---|
| 476 | #define mmCP_NUM_PRIM_WRITTEN_COUNT2_LO 0x2110 |
|---|
| 477 | #define mmCP_NUM_PRIM_WRITTEN_COUNT3_HI 0x2115 |
|---|
| 478 | #define mmCP_NUM_PRIM_WRITTEN_COUNT3_LO 0x2114 |
|---|
| 479 | #define mmCP_PA_CINVOC_COUNT_HI 0x2129 |
|---|
| 480 | #define mmCP_PA_CINVOC_COUNT_LO 0x2128 |
|---|
| 481 | #define mmCP_PA_CPRIM_COUNT_HI 0x212B |
|---|
| 482 | #define mmCP_PA_CPRIM_COUNT_LO 0x212A |
|---|
| 483 | #define mmCP_PERFMON_CNTL 0x21FF |
|---|
| 484 | #define mmCP_PERFMON_CNTX_CNTL 0xA0D8 |
|---|
| 485 | #define 0x21A2 |
|---|
| 486 | #define mmCP_PFP_IB_CONTROL 0x218D |
|---|
| 487 | #define mmCP_PFP_LOAD_CONTROL 0x218E |
|---|
| 488 | #define mmCP_PFP_UCODE_ADDR 0x3054 |
|---|
| 489 | #define mmCP_PFP_UCODE_DATA 0x3055 |
|---|
| 490 | #define mmCP_PIPE_STATS_ADDR_HI 0x2119 |
|---|
| 491 | #define mmCP_PIPE_STATS_ADDR_LO 0x2118 |
|---|
| 492 | #define mmCP_PWR_CNTL 0x3078 |
|---|
| 493 | #define mmCP_QUEUE_THRESHOLDS 0x21D8 |
|---|
| 494 | #define mmCP_RB0_BASE 0x3040 |
|---|
| 495 | #define mmCP_RB0_CNTL 0x3041 |
|---|
| 496 | #define mmCP_RB0_RPTR 0x21C0 |
|---|
| 497 | #define mmCP_RB0_RPTR_ADDR 0x3043 |
|---|
| 498 | #define mmCP_RB0_RPTR_ADDR_HI 0x3044 |
|---|
| 499 | #define mmCP_RB0_WPTR 0x3045 |
|---|
| 500 | #define mmCP_RB1_BASE 0x3060 |
|---|
| 501 | #define mmCP_RB1_CNTL 0x3061 |
|---|
| 502 | #define mmCP_RB1_RPTR 0x21BF |
|---|
| 503 | #define mmCP_RB1_RPTR_ADDR 0x3062 |
|---|
| 504 | #define mmCP_RB1_RPTR_ADDR_HI 0x3063 |
|---|
| 505 | #define mmCP_RB1_WPTR 0x3064 |
|---|
| 506 | #define mmCP_RB2_BASE 0x3065 |
|---|
| 507 | #define mmCP_RB2_CNTL 0x3066 |
|---|
| 508 | #define mmCP_RB2_RPTR 0x21BE |
|---|
| 509 | #define mmCP_RB2_RPTR_ADDR 0x3067 |
|---|
| 510 | #define mmCP_RB2_RPTR_ADDR_HI 0x3068 |
|---|
| 511 | #define mmCP_RB2_WPTR 0x3069 |
|---|
| 512 | #define mmCP_RB_BASE 0x3040 |
|---|
| 513 | #define mmCP_RB_CNTL 0x3041 |
|---|
| 514 | #define mmCP_RB_OFFSET 0x2191 |
|---|
| 515 | #define mmCP_RB_RPTR 0x21C0 |
|---|
| 516 | #define mmCP_RB_RPTR_ADDR 0x3043 |
|---|
| 517 | #define mmCP_RB_RPTR_ADDR_HI 0x3044 |
|---|
| 518 | #define mmCP_RB_RPTR_WR 0x3042 |
|---|
| 519 | #define mmCP_RB_VMID 0x3051 |
|---|
| 520 | #define mmCP_RB_WPTR 0x3045 |
|---|
| 521 | #define mmCP_RB_WPTR_DELAY 0x21C1 |
|---|
| 522 | #define mmCP_RB_WPTR_POLL_ADDR_HI 0x3047 |
|---|
| 523 | #define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046 |
|---|
| 524 | #define mmCP_RB_WPTR_POLL_CNTL 0x21C2 |
|---|
| 525 | #define mmCP_RING0_PRIORITY 0x304D |
|---|
| 526 | #define mmCP_RING1_PRIORITY 0x304E |
|---|
| 527 | #define mmCP_RING2_PRIORITY 0x304F |
|---|
| 528 | #define mmCP_RINGID 0xA0D9 |
|---|
| 529 | #define mmCP_RING_PRIORITY_CNTS 0x304C |
|---|
| 530 | #define mmCP_ROQ1_THRESHOLDS 0x21D5 |
|---|
| 531 | #define mmCP_ROQ2_AVAIL 0x21DC |
|---|
| 532 | #define mmCP_ROQ2_THRESHOLDS 0x21D6 |
|---|
| 533 | #define mmCP_ROQ_AVAIL 0x21DA |
|---|
| 534 | #define mmCP_ROQ_IB1_STAT 0x21E1 |
|---|
| 535 | #define mmCP_ROQ_IB2_STAT 0x21E2 |
|---|
| 536 | #define mmCP_ROQ_RB_STAT 0x21E0 |
|---|
| 537 | #define mmCP_SC_PSINVOC_COUNT0_HI 0x212D |
|---|
| 538 | #define mmCP_SC_PSINVOC_COUNT0_LO 0x212C |
|---|
| 539 | #define mmCP_SC_PSINVOC_COUNT1_HI 0x212F |
|---|
| 540 | #define mmCP_SC_PSINVOC_COUNT1_LO 0x212E |
|---|
| 541 | #define mmCP_SCRATCH_DATA 0x2190 |
|---|
| 542 | #define mmCP_SCRATCH_INDEX 0x218F |
|---|
| 543 | #define mmCP_SEM_INCOMPLETE_TIMER_CNTL 0x2172 |
|---|
| 544 | #define mmCP_SEM_WAIT_TIMER 0x216F |
|---|
| 545 | #define mmCP_SIG_SEM_ADDR_HI 0x2171 |
|---|
| 546 | #define mmCP_SIG_SEM_ADDR_LO 0x2170 |
|---|
| 547 | #define mmCP_STALLED_STAT1 0x219D |
|---|
| 548 | #define mmCP_STALLED_STAT2 0x219E |
|---|
| 549 | #define mmCP_STALLED_STAT3 0x219C |
|---|
| 550 | #define mmCP_STAT 0x21A0 |
|---|
| 551 | #define mmCP_ST_BASE_HI 0x21D3 |
|---|
| 552 | #define mmCP_ST_BASE_LO 0x21D2 |
|---|
| 553 | #define mmCP_ST_BUFSZ 0x21D4 |
|---|
| 554 | #define mmCP_STQ_AVAIL 0x21DB |
|---|
| 555 | #define mmCP_STQ_STAT 0x21E3 |
|---|
| 556 | #define mmCP_STQ_THRESHOLDS 0x21D7 |
|---|
| 557 | #define mmCP_STREAM_OUT_ADDR_HI 0x2107 |
|---|
| 558 | #define mmCP_STREAM_OUT_ADDR_LO 0x2106 |
|---|
| 559 | #define mmCP_STRMOUT_CNTL 0x213F |
|---|
| 560 | #define mmCP_VGT_CSINVOC_COUNT_HI 0x2131 |
|---|
| 561 | #define mmCP_VGT_CSINVOC_COUNT_LO 0x2130 |
|---|
| 562 | #define mmCP_VGT_DSINVOC_COUNT_HI 0x2127 |
|---|
| 563 | #define mmCP_VGT_DSINVOC_COUNT_LO 0x2126 |
|---|
| 564 | #define mmCP_VGT_GSINVOC_COUNT_HI 0x2123 |
|---|
| 565 | #define mmCP_VGT_GSINVOC_COUNT_LO 0x2122 |
|---|
| 566 | #define mmCP_VGT_GSPRIM_COUNT_HI 0x211F |
|---|
| 567 | #define mmCP_VGT_GSPRIM_COUNT_LO 0x211E |
|---|
| 568 | #define mmCP_VGT_HSINVOC_COUNT_HI 0x2125 |
|---|
| 569 | #define mmCP_VGT_HSINVOC_COUNT_LO 0x2124 |
|---|
| 570 | #define mmCP_VGT_IAPRIM_COUNT_HI 0x211D |
|---|
| 571 | #define mmCP_VGT_IAPRIM_COUNT_LO 0x211C |
|---|
| 572 | #define mmCP_VGT_IAVERT_COUNT_HI 0x211B |
|---|
| 573 | #define mmCP_VGT_IAVERT_COUNT_LO 0x211A |
|---|
| 574 | #define mmCP_VGT_VSINVOC_COUNT_HI 0x2121 |
|---|
| 575 | #define mmCP_VGT_VSINVOC_COUNT_LO 0x2120 |
|---|
| 576 | #define mmCP_VMID 0xA0DA |
|---|
| 577 | #define mmCP_WAIT_REG_MEM_TIMEOUT 0x2174 |
|---|
| 578 | #define mmCP_WAIT_SEM_ADDR_HI 0x2176 |
|---|
| 579 | #define mmCP_WAIT_SEM_ADDR_LO 0x2175 |
|---|
| 580 | #define mmCS_COPY_STATE 0xA1F3 |
|---|
| 581 | #define mmDB_ALPHA_TO_MASK 0xA2DC |
|---|
| 582 | #define mmDB_CGTT_CLK_CTRL_0 0x261A |
|---|
| 583 | #define mmDB_COUNT_CONTROL 0xA001 |
|---|
| 584 | #define mmDB_CREDIT_LIMIT 0x2614 |
|---|
| 585 | #define mmDB_DEBUG 0x260C |
|---|
| 586 | #define mmDB_DEBUG2 0x260D |
|---|
| 587 | #define mmDB_DEBUG3 0x260E |
|---|
| 588 | #define mmDB_DEBUG4 0x260F |
|---|
| 589 | #define mmDB_DEPTH_BOUNDS_MAX 0xA009 |
|---|
| 590 | #define mmDB_DEPTH_BOUNDS_MIN 0xA008 |
|---|
| 591 | #define mmDB_DEPTH_CLEAR 0xA00B |
|---|
| 592 | #define mmDB_DEPTH_CONTROL 0xA200 |
|---|
| 593 | #define mmDB_DEPTH_INFO 0xA00F |
|---|
| 594 | #define mmDB_DEPTH_SIZE 0xA016 |
|---|
| 595 | #define mmDB_DEPTH_SLICE 0xA017 |
|---|
| 596 | #define mmDB_DEPTH_VIEW 0xA002 |
|---|
| 597 | #define mmDB_EQAA 0xA201 |
|---|
| 598 | #define mmDB_FIFO_DEPTH1 0x2618 |
|---|
| 599 | #define mmDB_FIFO_DEPTH2 0x2619 |
|---|
| 600 | #define mmDB_FREE_CACHELINES 0x2617 |
|---|
| 601 | #define mmDB_HTILE_DATA_BASE 0xA005 |
|---|
| 602 | #define mmDB_HTILE_SURFACE 0xA2AF |
|---|
| 603 | #define mmDB_PERFCOUNTER0_HI 0x2602 |
|---|
| 604 | #define mmDB_PERFCOUNTER0_LO 0x2601 |
|---|
| 605 | #define mmDB_PERFCOUNTER0_SELECT 0x2600 |
|---|
| 606 | #define mmDB_PERFCOUNTER1_HI 0x2605 |
|---|
| 607 | #define mmDB_PERFCOUNTER1_LO 0x2604 |
|---|
| 608 | #define mmDB_PERFCOUNTER1_SELECT 0x2603 |
|---|
| 609 | #define mmDB_PERFCOUNTER2_HI 0x2608 |
|---|
| 610 | #define mmDB_PERFCOUNTER2_LO 0x2607 |
|---|
| 611 | #define mmDB_PERFCOUNTER2_SELECT 0x2606 |
|---|
| 612 | #define mmDB_PERFCOUNTER3_HI 0x260B |
|---|
| 613 | #define mmDB_PERFCOUNTER3_LO 0x260A |
|---|
| 614 | #define mmDB_PERFCOUNTER3_SELECT 0x2609 |
|---|
| 615 | #define mmDB_PRELOAD_CONTROL 0xA2B2 |
|---|
| 616 | #define mmDB_READ_DEBUG_0 0x2620 |
|---|
| 617 | #define mmDB_READ_DEBUG_1 0x2621 |
|---|
| 618 | #define mmDB_READ_DEBUG_2 0x2622 |
|---|
| 619 | #define mmDB_READ_DEBUG_3 0x2623 |
|---|
| 620 | #define mmDB_READ_DEBUG_4 0x2624 |
|---|
| 621 | #define mmDB_READ_DEBUG_5 0x2625 |
|---|
| 622 | #define mmDB_READ_DEBUG_6 0x2626 |
|---|
| 623 | #define mmDB_READ_DEBUG_7 0x2627 |
|---|
| 624 | #define mmDB_READ_DEBUG_8 0x2628 |
|---|
| 625 | #define mmDB_READ_DEBUG_9 0x2629 |
|---|
| 626 | #define mmDB_READ_DEBUG_A 0x262A |
|---|
| 627 | #define mmDB_READ_DEBUG_B 0x262B |
|---|
| 628 | #define mmDB_READ_DEBUG_C 0x262C |
|---|
| 629 | #define mmDB_READ_DEBUG_D 0x262D |
|---|
| 630 | #define mmDB_READ_DEBUG_E 0x262E |
|---|
| 631 | #define mmDB_READ_DEBUG_F 0x262F |
|---|
| 632 | #define mmDB_RENDER_CONTROL 0xA000 |
|---|
| 633 | #define mmDB_RENDER_OVERRIDE 0xA003 |
|---|
| 634 | #define mmDB_RENDER_OVERRIDE2 0xA004 |
|---|
| 635 | #define mmDB_SHADER_CONTROL 0xA203 |
|---|
| 636 | #define mmDB_SRESULTS_COMPARE_STATE0 0xA2B0 |
|---|
| 637 | #define mmDB_SRESULTS_COMPARE_STATE1 0xA2B1 |
|---|
| 638 | #define mmDB_STENCIL_CLEAR 0xA00A |
|---|
| 639 | #define mmDB_STENCIL_CONTROL 0xA10B |
|---|
| 640 | #define mmDB_STENCIL_INFO 0xA011 |
|---|
| 641 | #define mmDB_STENCIL_READ_BASE 0xA013 |
|---|
| 642 | #define mmDB_STENCILREFMASK 0xA10C |
|---|
| 643 | #define mmDB_STENCILREFMASK_BF 0xA10D |
|---|
| 644 | #define mmDB_STENCIL_WRITE_BASE 0xA015 |
|---|
| 645 | #define mmDB_SUBTILE_CONTROL 0x2616 |
|---|
| 646 | #define mmDB_WATERMARKS 0x2615 |
|---|
| 647 | #define mmDB_Z_INFO 0xA010 |
|---|
| 648 | #define mmDB_ZPASS_COUNT_HI 0x261D |
|---|
| 649 | #define mmDB_ZPASS_COUNT_LOW 0x261C |
|---|
| 650 | #define mmDB_Z_READ_BASE 0xA012 |
|---|
| 651 | #define mmDB_Z_WRITE_BASE 0xA014 |
|---|
| 652 | #define mmDEBUG_DATA 0x203D |
|---|
| 653 | #define mmDEBUG_INDEX 0x203C |
|---|
| 654 | #define mmGB_ADDR_CONFIG 0x263E |
|---|
| 655 | #define mmGB_BACKEND_MAP 0x263F |
|---|
| 656 | #define mmGB_EDC_MODE 0x307E |
|---|
| 657 | #define mmGB_GPU_ID 0x2640 |
|---|
| 658 | #define mmGB_TILE_MODE0 0x2644 |
|---|
| 659 | #define mmGB_TILE_MODE10 0x264E |
|---|
| 660 | #define mmGB_TILE_MODE1 0x2645 |
|---|
| 661 | #define mmGB_TILE_MODE11 0x264F |
|---|
| 662 | #define mmGB_TILE_MODE12 0x2650 |
|---|
| 663 | #define mmGB_TILE_MODE13 0x2651 |
|---|
| 664 | #define mmGB_TILE_MODE14 0x2652 |
|---|
| 665 | #define mmGB_TILE_MODE15 0x2653 |
|---|
| 666 | #define mmGB_TILE_MODE16 0x2654 |
|---|
| 667 | #define mmGB_TILE_MODE17 0x2655 |
|---|
| 668 | #define mmGB_TILE_MODE18 0x2656 |
|---|
| 669 | #define mmGB_TILE_MODE19 0x2657 |
|---|
| 670 | #define mmGB_TILE_MODE20 0x2658 |
|---|
| 671 | #define mmGB_TILE_MODE2 0x2646 |
|---|
| 672 | #define mmGB_TILE_MODE21 0x2659 |
|---|
| 673 | #define mmGB_TILE_MODE22 0x265A |
|---|
| 674 | #define mmGB_TILE_MODE23 0x265B |
|---|
| 675 | #define mmGB_TILE_MODE24 0x265C |
|---|
| 676 | #define mmGB_TILE_MODE25 0x265D |
|---|
| 677 | #define mmGB_TILE_MODE26 0x265E |
|---|
| 678 | #define mmGB_TILE_MODE27 0x265F |
|---|
| 679 | #define mmGB_TILE_MODE28 0x2660 |
|---|
| 680 | #define mmGB_TILE_MODE29 0x2661 |
|---|
| 681 | #define mmGB_TILE_MODE30 0x2662 |
|---|
| 682 | #define mmGB_TILE_MODE3 0x2647 |
|---|
| 683 | #define mmGB_TILE_MODE31 0x2663 |
|---|
| 684 | #define mmGB_TILE_MODE4 0x2648 |
|---|
| 685 | #define mmGB_TILE_MODE5 0x2649 |
|---|
| 686 | #define mmGB_TILE_MODE6 0x264A |
|---|
| 687 | #define mmGB_TILE_MODE7 0x264B |
|---|
| 688 | #define mmGB_TILE_MODE8 0x264C |
|---|
| 689 | #define mmGB_TILE_MODE9 0x264D |
|---|
| 690 | #define mmGC_PRIV_MODE 0x3048 |
|---|
| 691 | #define mmGC_USER_RB_BACKEND_DISABLE 0x26DF |
|---|
| 692 | #define mmGC_USER_SHADER_ARRAY_CONFIG 0x2270 |
|---|
| 693 | #define mmGDS_ATOM_BASE 0x25CE |
|---|
| 694 | #define mmGDS_ATOM_CNTL 0x25CC |
|---|
| 695 | #define mmGDS_ATOM_COMPLETE 0x25CD |
|---|
| 696 | #define mmGDS_ATOM_DST 0x25D2 |
|---|
| 697 | #define mmGDS_ATOM_OFFSET0 0x25D0 |
|---|
| 698 | #define mmGDS_ATOM_OFFSET1 0x25D1 |
|---|
| 699 | #define mmGDS_ATOM_OP 0x25D3 |
|---|
| 700 | #define mmGDS_ATOM_READ0 0x25D8 |
|---|
| 701 | #define mmGDS_ATOM_READ0_U 0x25D9 |
|---|
| 702 | #define mmGDS_ATOM_READ1 0x25DA |
|---|
| 703 | #define mmGDS_ATOM_READ1_U 0x25DB |
|---|
| 704 | #define mmGDS_ATOM_SIZE 0x25CF |
|---|
| 705 | #define mmGDS_ATOM_SRC0 0x25D4 |
|---|
| 706 | #define mmGDS_ATOM_SRC0_U 0x25D5 |
|---|
| 707 | #define mmGDS_ATOM_SRC1 0x25D6 |
|---|
| 708 | #define mmGDS_ATOM_SRC1_U 0x25D7 |
|---|
| 709 | #define mmGDS_CNTL_STATUS 0x25C1 |
|---|
| 710 | #define mmGDS_CONFIG 0x25C0 |
|---|
| 711 | #define mmGDS_DEBUG_CNTL 0x25DE |
|---|
| 712 | #define mmGDS_DEBUG_DATA 0x25DF |
|---|
| 713 | #define mmGDS_ENHANCE 0x25DC |
|---|
| 714 | #define mmGDS_GRBM_SECDED_CNT 0x25E3 |
|---|
| 715 | #define mmGDS_GWS_RESOURCE 0x25E1 |
|---|
| 716 | #define mmGDS_GWS_RESOURCE_CNTL 0x25E0 |
|---|
| 717 | #define mmGDS_OA_DED 0x25E4 |
|---|
| 718 | #define mmGDS_PERFCOUNTER0_HI 0x25E7 |
|---|
| 719 | #define mmGDS_PERFCOUNTER0_LO 0x25E6 |
|---|
| 720 | #define mmGDS_PERFCOUNTER0_SELECT 0x25E5 |
|---|
| 721 | #define mmGDS_PERFCOUNTER1_HI 0x25EA |
|---|
| 722 | #define mmGDS_PERFCOUNTER1_LO 0x25E9 |
|---|
| 723 | #define mmGDS_PERFCOUNTER1_SELECT 0x25E8 |
|---|
| 724 | #define mmGDS_PERFCOUNTER2_HI 0x25ED |
|---|
| 725 | #define mmGDS_PERFCOUNTER2_LO 0x25EC |
|---|
| 726 | #define mmGDS_PERFCOUNTER2_SELECT 0x25EB |
|---|
| 727 | #define mmGDS_PERFCOUNTER3_HI 0x25F0 |
|---|
| 728 | #define mmGDS_PERFCOUNTER3_LO 0x25EF |
|---|
| 729 | #define mmGDS_PERFCOUNTER3_SELECT 0x25EE |
|---|
| 730 | #define mmGDS_RD_ADDR 0x25C2 |
|---|
| 731 | #define mmGDS_RD_BURST_ADDR 0x25C4 |
|---|
| 732 | #define mmGDS_RD_BURST_COUNT 0x25C5 |
|---|
| 733 | #define mmGDS_RD_BURST_DATA 0x25C6 |
|---|
| 734 | #define mmGDS_RD_DATA 0x25C3 |
|---|
| 735 | #define mmGDS_SECDED_CNT 0x25E2 |
|---|
| 736 | #define mmGDS_WR_ADDR 0x25C7 |
|---|
| 737 | #define mmGDS_WR_BURST_ADDR 0x25C9 |
|---|
| 738 | #define mmGDS_WR_BURST_DATA 0x25CA |
|---|
| 739 | #define mmGDS_WR_DATA 0x25C8 |
|---|
| 740 | #define mmGDS_WRITE_COMPLETE 0x25CB |
|---|
| 741 | #define mmGFX_COPY_STATE 0xA1F4 |
|---|
| 742 | #define mmGRBM_CAM_DATA 0x3001 |
|---|
| 743 | #define mmGRBM_CAM_INDEX 0x3000 |
|---|
| 744 | #define mmGRBM_CNTL 0x2000 |
|---|
| 745 | #define mmGRBM_DEBUG 0x2014 |
|---|
| 746 | #define mmGRBM_DEBUG_CNTL 0x2009 |
|---|
| 747 | #define mmGRBM_DEBUG_DATA 0x200A |
|---|
| 748 | #define mmGRBM_DEBUG_SNAPSHOT 0x2015 |
|---|
| 749 | #define mmGRBM_GFX_CLKEN_CNTL 0x200C |
|---|
| 750 | #define mmGRBM_GFX_INDEX 0x200B |
|---|
| 751 | #define mmGRBM_INT_CNTL 0x2018 |
|---|
| 752 | #define mmGRBM_NOWHERE 0x203F |
|---|
| 753 | #define mmGRBM_PERFCOUNTER0_HI 0x201F |
|---|
| 754 | #define mmGRBM_PERFCOUNTER0_LO 0x201E |
|---|
| 755 | #define mmGRBM_PERFCOUNTER0_SELECT 0x201C |
|---|
| 756 | #define mmGRBM_PERFCOUNTER1_HI 0x2021 |
|---|
| 757 | #define mmGRBM_PERFCOUNTER1_LO 0x2020 |
|---|
| 758 | #define mmGRBM_PERFCOUNTER1_SELECT 0x201D |
|---|
| 759 | #define mmGRBM_PWR_CNTL 0x2003 |
|---|
| 760 | #define mmGRBM_READ_ERROR 0x2016 |
|---|
| 761 | #define mmGRBM_SCRATCH_REG0 0x2040 |
|---|
| 762 | #define mmGRBM_SCRATCH_REG1 0x2041 |
|---|
| 763 | #define mmGRBM_SCRATCH_REG2 0x2042 |
|---|
| 764 | #define mmGRBM_SCRATCH_REG3 0x2043 |
|---|
| 765 | #define mmGRBM_SCRATCH_REG4 0x2044 |
|---|
| 766 | #define mmGRBM_SCRATCH_REG5 0x2045 |
|---|
| 767 | #define mmGRBM_SCRATCH_REG6 0x2046 |
|---|
| 768 | #define mmGRBM_SCRATCH_REG7 0x2047 |
|---|
| 769 | #define mmGRBM_SE0_PERFCOUNTER_HI 0x202B |
|---|
| 770 | #define mmGRBM_SE0_PERFCOUNTER_LO 0x202A |
|---|
| 771 | #define mmGRBM_SE0_PERFCOUNTER_SELECT 0x2026 |
|---|
| 772 | #define mmGRBM_SE1_PERFCOUNTER_HI 0x202D |
|---|
| 773 | #define mmGRBM_SE1_PERFCOUNTER_LO 0x202C |
|---|
| 774 | #define mmGRBM_SE1_PERFCOUNTER_SELECT 0x2027 |
|---|
| 775 | #define mmGRBM_SKEW_CNTL 0x2001 |
|---|
| 776 | #define mmGRBM_SOFT_RESET 0x2008 |
|---|
| 777 | #define mmGRBM_STATUS 0x2004 |
|---|
| 778 | #define mmGRBM_STATUS2 0x2002 |
|---|
| 779 | #define mmGRBM_STATUS_SE0 0x2005 |
|---|
| 780 | #define mmGRBM_STATUS_SE1 0x2006 |
|---|
| 781 | #define mmGRBM_WAIT_IDLE_CLOCKS 0x200D |
|---|
| 782 | #define mmIA_CNTL_STATUS 0x2237 |
|---|
| 783 | #define mmIA_DEBUG_CNTL 0x223A |
|---|
| 784 | #define mmIA_DEBUG_DATA 0x223B |
|---|
| 785 | #define mmIA_ENHANCE 0xA29C |
|---|
| 786 | #define mmIA_MULTI_VGT_PARAM 0xA2AA |
|---|
| 787 | #define mmIA_PERFCOUNTER0_HI 0x2225 |
|---|
| 788 | #define mmIA_PERFCOUNTER0_LO 0x2224 |
|---|
| 789 | #define mmIA_PERFCOUNTER0_SELECT 0x2220 |
|---|
| 790 | #define mmIA_PERFCOUNTER1_HI 0x2227 |
|---|
| 791 | #define mmIA_PERFCOUNTER1_LO 0x2226 |
|---|
| 792 | #define mmIA_PERFCOUNTER1_SELECT 0x2221 |
|---|
| 793 | #define mmIA_PERFCOUNTER2_HI 0x2229 |
|---|
| 794 | #define mmIA_PERFCOUNTER2_LO 0x2228 |
|---|
| 795 | #define mmIA_PERFCOUNTER2_SELECT 0x2222 |
|---|
| 796 | #define mmIA_PERFCOUNTER3_HI 0x222B |
|---|
| 797 | #define mmIA_PERFCOUNTER3_LO 0x222A |
|---|
| 798 | #define mmIA_PERFCOUNTER3_SELECT 0x2223 |
|---|
| 799 | #define mmIA_VMID_OVERRIDE 0x2260 |
|---|
| 800 | #define mmPA_CL_CLIP_CNTL 0xA204 |
|---|
| 801 | #define mmPA_CL_CNTL_STATUS 0x2284 |
|---|
| 802 | #define mmPA_CL_ENHANCE 0x2285 |
|---|
| 803 | #define mmPA_CL_GB_HORZ_CLIP_ADJ 0xA2FC |
|---|
| 804 | #define mmPA_CL_GB_HORZ_DISC_ADJ 0xA2FD |
|---|
| 805 | #define mmPA_CL_GB_VERT_CLIP_ADJ 0xA2FA |
|---|
| 806 | #define mmPA_CL_GB_VERT_DISC_ADJ 0xA2FB |
|---|
| 807 | #define mmPA_CL_NANINF_CNTL 0xA208 |
|---|
| 808 | #define mmPA_CL_POINT_CULL_RAD 0xA1F8 |
|---|
| 809 | #define mmPA_CL_POINT_SIZE 0xA1F7 |
|---|
| 810 | #define mmPA_CL_POINT_X_RAD 0xA1F5 |
|---|
| 811 | #define mmPA_CL_POINT_Y_RAD 0xA1F6 |
|---|
| 812 | #define mmPA_CL_UCP_0_W 0xA172 |
|---|
| 813 | #define mmPA_CL_UCP_0_X 0xA16F |
|---|
| 814 | #define mmPA_CL_UCP_0_Y 0xA170 |
|---|
| 815 | #define mmPA_CL_UCP_0_Z 0xA171 |
|---|
| 816 | #define mmPA_CL_UCP_1_W 0xA176 |
|---|
| 817 | #define mmPA_CL_UCP_1_X 0xA173 |
|---|
| 818 | #define mmPA_CL_UCP_1_Y 0xA174 |
|---|
| 819 | #define mmPA_CL_UCP_1_Z 0xA175 |
|---|
| 820 | #define mmPA_CL_UCP_2_W 0xA17A |
|---|
| 821 | #define mmPA_CL_UCP_2_X 0xA177 |
|---|
| 822 | #define mmPA_CL_UCP_2_Y 0xA178 |
|---|
| 823 | #define mmPA_CL_UCP_2_Z 0xA179 |
|---|
| 824 | #define mmPA_CL_UCP_3_W 0xA17E |
|---|
| 825 | #define mmPA_CL_UCP_3_X 0xA17B |
|---|
| 826 | #define mmPA_CL_UCP_3_Y 0xA17C |
|---|
| 827 | #define mmPA_CL_UCP_3_Z 0xA17D |
|---|
| 828 | #define mmPA_CL_UCP_4_W 0xA182 |
|---|
| 829 | #define mmPA_CL_UCP_4_X 0xA17F |
|---|
| 830 | #define mmPA_CL_UCP_4_Y 0xA180 |
|---|
| 831 | #define mmPA_CL_UCP_4_Z 0xA181 |
|---|
| 832 | #define mmPA_CL_UCP_5_W 0xA186 |
|---|
| 833 | #define mmPA_CL_UCP_5_X 0xA183 |
|---|
| 834 | #define mmPA_CL_UCP_5_Y 0xA184 |
|---|
| 835 | #define mmPA_CL_UCP_5_Z 0xA185 |
|---|
| 836 | #define mmPA_CL_VPORT_XOFFSET 0xA110 |
|---|
| 837 | #define mmPA_CL_VPORT_XOFFSET_10 0xA14C |
|---|
| 838 | #define mmPA_CL_VPORT_XOFFSET_1 0xA116 |
|---|
| 839 | #define mmPA_CL_VPORT_XOFFSET_11 0xA152 |
|---|
| 840 | #define mmPA_CL_VPORT_XOFFSET_12 0xA158 |
|---|
| 841 | #define mmPA_CL_VPORT_XOFFSET_13 0xA15E |
|---|
| 842 | #define mmPA_CL_VPORT_XOFFSET_14 0xA164 |
|---|
| 843 | #define mmPA_CL_VPORT_XOFFSET_15 0xA16A |
|---|
| 844 | #define mmPA_CL_VPORT_XOFFSET_2 0xA11C |
|---|
| 845 | #define mmPA_CL_VPORT_XOFFSET_3 0xA122 |
|---|
| 846 | #define mmPA_CL_VPORT_XOFFSET_4 0xA128 |
|---|
| 847 | #define mmPA_CL_VPORT_XOFFSET_5 0xA12E |
|---|
| 848 | #define mmPA_CL_VPORT_XOFFSET_6 0xA134 |
|---|
| 849 | #define mmPA_CL_VPORT_XOFFSET_7 0xA13A |
|---|
| 850 | #define mmPA_CL_VPORT_XOFFSET_8 0xA140 |
|---|
| 851 | #define mmPA_CL_VPORT_XOFFSET_9 0xA146 |
|---|
| 852 | #define mmPA_CL_VPORT_XSCALE 0xA10F |
|---|
| 853 | #define mmPA_CL_VPORT_XSCALE_10 0xA14B |
|---|
| 854 | #define mmPA_CL_VPORT_XSCALE_1 0xA115 |
|---|
| 855 | #define mmPA_CL_VPORT_XSCALE_11 0xA151 |
|---|
| 856 | #define mmPA_CL_VPORT_XSCALE_12 0xA157 |
|---|
| 857 | #define mmPA_CL_VPORT_XSCALE_13 0xA15D |
|---|
| 858 | #define mmPA_CL_VPORT_XSCALE_14 0xA163 |
|---|
| 859 | #define mmPA_CL_VPORT_XSCALE_15 0xA169 |
|---|
| 860 | #define mmPA_CL_VPORT_XSCALE_2 0xA11B |
|---|
| 861 | #define mmPA_CL_VPORT_XSCALE_3 0xA121 |
|---|
| 862 | #define mmPA_CL_VPORT_XSCALE_4 0xA127 |
|---|
| 863 | #define mmPA_CL_VPORT_XSCALE_5 0xA12D |
|---|
| 864 | #define mmPA_CL_VPORT_XSCALE_6 0xA133 |
|---|
| 865 | #define mmPA_CL_VPORT_XSCALE_7 0xA139 |
|---|
| 866 | #define mmPA_CL_VPORT_XSCALE_8 0xA13F |
|---|
| 867 | #define mmPA_CL_VPORT_XSCALE_9 0xA145 |
|---|
| 868 | #define mmPA_CL_VPORT_YOFFSET 0xA112 |
|---|
| 869 | #define mmPA_CL_VPORT_YOFFSET_10 0xA14E |
|---|
| 870 | #define mmPA_CL_VPORT_YOFFSET_1 0xA118 |
|---|
| 871 | #define mmPA_CL_VPORT_YOFFSET_11 0xA154 |
|---|
| 872 | #define mmPA_CL_VPORT_YOFFSET_12 0xA15A |
|---|
| 873 | #define mmPA_CL_VPORT_YOFFSET_13 0xA160 |
|---|
| 874 | #define mmPA_CL_VPORT_YOFFSET_14 0xA166 |
|---|
| 875 | #define mmPA_CL_VPORT_YOFFSET_15 0xA16C |
|---|
| 876 | #define mmPA_CL_VPORT_YOFFSET_2 0xA11E |
|---|
| 877 | #define mmPA_CL_VPORT_YOFFSET_3 0xA124 |
|---|
| 878 | #define mmPA_CL_VPORT_YOFFSET_4 0xA12A |
|---|
| 879 | #define mmPA_CL_VPORT_YOFFSET_5 0xA130 |
|---|
| 880 | #define mmPA_CL_VPORT_YOFFSET_6 0xA136 |
|---|
| 881 | #define mmPA_CL_VPORT_YOFFSET_7 0xA13C |
|---|
| 882 | #define mmPA_CL_VPORT_YOFFSET_8 0xA142 |
|---|
| 883 | #define mmPA_CL_VPORT_YOFFSET_9 0xA148 |
|---|
| 884 | #define mmPA_CL_VPORT_YSCALE 0xA111 |
|---|
| 885 | #define mmPA_CL_VPORT_YSCALE_10 0xA14D |
|---|
| 886 | #define mmPA_CL_VPORT_YSCALE_1 0xA117 |
|---|
| 887 | #define mmPA_CL_VPORT_YSCALE_11 0xA153 |
|---|
| 888 | #define mmPA_CL_VPORT_YSCALE_12 0xA159 |
|---|
| 889 | #define mmPA_CL_VPORT_YSCALE_13 0xA15F |
|---|
| 890 | #define mmPA_CL_VPORT_YSCALE_14 0xA165 |
|---|
| 891 | #define mmPA_CL_VPORT_YSCALE_15 0xA16B |
|---|
| 892 | #define mmPA_CL_VPORT_YSCALE_2 0xA11D |
|---|
| 893 | #define mmPA_CL_VPORT_YSCALE_3 0xA123 |
|---|
| 894 | #define mmPA_CL_VPORT_YSCALE_4 0xA129 |
|---|
| 895 | #define mmPA_CL_VPORT_YSCALE_5 0xA12F |
|---|
| 896 | #define mmPA_CL_VPORT_YSCALE_6 0xA135 |
|---|
| 897 | #define mmPA_CL_VPORT_YSCALE_7 0xA13B |
|---|
| 898 | #define mmPA_CL_VPORT_YSCALE_8 0xA141 |
|---|
| 899 | #define mmPA_CL_VPORT_YSCALE_9 0xA147 |
|---|
| 900 | #define mmPA_CL_VPORT_ZOFFSET 0xA114 |
|---|
| 901 | #define mmPA_CL_VPORT_ZOFFSET_10 0xA150 |
|---|
| 902 | #define mmPA_CL_VPORT_ZOFFSET_1 0xA11A |
|---|
| 903 | #define mmPA_CL_VPORT_ZOFFSET_11 0xA156 |
|---|
| 904 | #define mmPA_CL_VPORT_ZOFFSET_12 0xA15C |
|---|
| 905 | #define mmPA_CL_VPORT_ZOFFSET_13 0xA162 |
|---|
| 906 | #define mmPA_CL_VPORT_ZOFFSET_14 0xA168 |
|---|
| 907 | #define mmPA_CL_VPORT_ZOFFSET_15 0xA16E |
|---|
| 908 | #define mmPA_CL_VPORT_ZOFFSET_2 0xA120 |
|---|
| 909 | #define mmPA_CL_VPORT_ZOFFSET_3 0xA126 |
|---|
| 910 | #define mmPA_CL_VPORT_ZOFFSET_4 0xA12C |
|---|
| 911 | #define mmPA_CL_VPORT_ZOFFSET_5 0xA132 |
|---|
| 912 | #define mmPA_CL_VPORT_ZOFFSET_6 0xA138 |
|---|
| 913 | #define mmPA_CL_VPORT_ZOFFSET_7 0xA13E |
|---|
| 914 | #define mmPA_CL_VPORT_ZOFFSET_8 0xA144 |
|---|
| 915 | #define mmPA_CL_VPORT_ZOFFSET_9 0xA14A |
|---|
| 916 | #define mmPA_CL_VPORT_ZSCALE 0xA113 |
|---|
| 917 | #define mmPA_CL_VPORT_ZSCALE_10 0xA14F |
|---|
| 918 | #define mmPA_CL_VPORT_ZSCALE_1 0xA119 |
|---|
| 919 | #define mmPA_CL_VPORT_ZSCALE_11 0xA155 |
|---|
| 920 | #define mmPA_CL_VPORT_ZSCALE_12 0xA15B |
|---|
| 921 | #define mmPA_CL_VPORT_ZSCALE_13 0xA161 |
|---|
| 922 | #define mmPA_CL_VPORT_ZSCALE_14 0xA167 |
|---|
| 923 | #define mmPA_CL_VPORT_ZSCALE_15 0xA16D |
|---|
| 924 | #define mmPA_CL_VPORT_ZSCALE_2 0xA11F |
|---|
| 925 | #define mmPA_CL_VPORT_ZSCALE_3 0xA125 |
|---|
| 926 | #define mmPA_CL_VPORT_ZSCALE_4 0xA12B |
|---|
| 927 | #define mmPA_CL_VPORT_ZSCALE_5 0xA131 |
|---|
| 928 | #define mmPA_CL_VPORT_ZSCALE_6 0xA137 |
|---|
| 929 | #define mmPA_CL_VPORT_ZSCALE_7 0xA13D |
|---|
| 930 | #define mmPA_CL_VPORT_ZSCALE_8 0xA143 |
|---|
| 931 | #define mmPA_CL_VPORT_ZSCALE_9 0xA149 |
|---|
| 932 | #define mmPA_CL_VS_OUT_CNTL 0xA207 |
|---|
| 933 | #define mmPA_CL_VTE_CNTL 0xA206 |
|---|
| 934 | #define mmPA_SC_AA_CONFIG 0xA2F8 |
|---|
| 935 | #define mmPA_SC_AA_MASK_X0Y0_X1Y0 0xA30E |
|---|
| 936 | #define mmPA_SC_AA_MASK_X0Y1_X1Y1 0xA30F |
|---|
| 937 | #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0xA2FE |
|---|
| 938 | #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1 0xA2FF |
|---|
| 939 | #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2 0xA300 |
|---|
| 940 | #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3 0xA301 |
|---|
| 941 | #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0xA306 |
|---|
| 942 | #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1 0xA307 |
|---|
| 943 | #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2 0xA308 |
|---|
| 944 | #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3 0xA309 |
|---|
| 945 | #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0xA302 |
|---|
| 946 | #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1 0xA303 |
|---|
| 947 | #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2 0xA304 |
|---|
| 948 | #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3 0xA305 |
|---|
| 949 | #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0xA30A |
|---|
| 950 | #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1 0xA30B |
|---|
| 951 | #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2 0xA30C |
|---|
| 952 | #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3 0xA30D |
|---|
| 953 | #define mmPA_SC_CENTROID_PRIORITY_0 0xA2F5 |
|---|
| 954 | #define mmPA_SC_CENTROID_PRIORITY_1 0xA2F6 |
|---|
| 955 | #define mmPA_SC_CLIPRECT_0_BR 0xA085 |
|---|
| 956 | #define mmPA_SC_CLIPRECT_0_TL 0xA084 |
|---|
| 957 | #define mmPA_SC_CLIPRECT_1_BR 0xA087 |
|---|
| 958 | #define mmPA_SC_CLIPRECT_1_TL 0xA086 |
|---|
| 959 | #define mmPA_SC_CLIPRECT_2_BR 0xA089 |
|---|
| 960 | #define mmPA_SC_CLIPRECT_2_TL 0xA088 |
|---|
| 961 | #define mmPA_SC_CLIPRECT_3_BR 0xA08B |
|---|
| 962 | #define mmPA_SC_CLIPRECT_3_TL 0xA08A |
|---|
| 963 | #define mmPA_SC_CLIPRECT_RULE 0xA083 |
|---|
| 964 | #define mmPA_SC_DEBUG_CNTL 0x22F6 |
|---|
| 965 | #define mmPA_SC_DEBUG_DATA 0x22F7 |
|---|
| 966 | #define mmPA_SC_EDGERULE 0xA08C |
|---|
| 967 | #define mmPA_SC_ENHANCE 0x22FC |
|---|
| 968 | #define mmPA_SC_FIFO_DEPTH_CNTL 0x2295 |
|---|
| 969 | #define mmPA_SC_FIFO_SIZE 0x22F3 |
|---|
| 970 | #define mmPA_SC_FORCE_EOV_MAX_CNTS 0x22C9 |
|---|
| 971 | #define mmPA_SC_GENERIC_SCISSOR_BR 0xA091 |
|---|
| 972 | #define mmPA_SC_GENERIC_SCISSOR_TL 0xA090 |
|---|
| 973 | #define mmPA_SC_IF_FIFO_SIZE 0x22F5 |
|---|
| 974 | #define mmPA_SC_LINE_CNTL 0xA2F7 |
|---|
| 975 | #define mmPA_SC_LINE_STIPPLE 0xA283 |
|---|
| 976 | #define mmPA_SC_LINE_STIPPLE_STATE 0x22C4 |
|---|
| 977 | #define mmPA_SC_MODE_CNTL_0 0xA292 |
|---|
| 978 | #define mmPA_SC_MODE_CNTL_1 0xA293 |
|---|
| 979 | #define mmPA_SC_PERFCOUNTER0_HI 0x22A9 |
|---|
| 980 | #define mmPA_SC_PERFCOUNTER0_LO 0x22A8 |
|---|
| 981 | #define mmPA_SC_PERFCOUNTER0_SELECT 0x22A0 |
|---|
| 982 | #define mmPA_SC_PERFCOUNTER1_HI 0x22AB |
|---|
| 983 | #define mmPA_SC_PERFCOUNTER1_LO 0x22AA |
|---|
| 984 | #define mmPA_SC_PERFCOUNTER1_SELECT 0x22A1 |
|---|
| 985 | #define mmPA_SC_PERFCOUNTER2_HI 0x22AD |
|---|
| 986 | #define mmPA_SC_PERFCOUNTER2_LO 0x22AC |
|---|
| 987 | #define mmPA_SC_PERFCOUNTER2_SELECT 0x22A2 |
|---|
| 988 | #define mmPA_SC_PERFCOUNTER3_HI 0x22AF |
|---|
| 989 | #define mmPA_SC_PERFCOUNTER3_LO 0x22AE |
|---|
| 990 | #define mmPA_SC_PERFCOUNTER3_SELECT 0x22A3 |
|---|
| 991 | #define mmPA_SC_PERFCOUNTER4_HI 0x22B1 |
|---|
| 992 | #define mmPA_SC_PERFCOUNTER4_LO 0x22B0 |
|---|
| 993 | #define mmPA_SC_PERFCOUNTER4_SELECT 0x22A4 |
|---|
| 994 | #define mmPA_SC_PERFCOUNTER5_HI 0x22B3 |
|---|
| 995 | #define mmPA_SC_PERFCOUNTER5_LO 0x22B2 |
|---|
| 996 | #define mmPA_SC_PERFCOUNTER5_SELECT 0x22A5 |
|---|
| 997 | #define mmPA_SC_PERFCOUNTER6_HI 0x22B5 |
|---|
| 998 | #define mmPA_SC_PERFCOUNTER6_LO 0x22B4 |
|---|
| 999 | #define mmPA_SC_PERFCOUNTER6_SELECT 0x22A6 |
|---|
| 1000 | #define mmPA_SC_PERFCOUNTER7_HI 0x22B7 |
|---|
| 1001 | #define mmPA_SC_PERFCOUNTER7_LO 0x22B6 |
|---|
| 1002 | #define mmPA_SC_PERFCOUNTER7_SELECT 0x22A7 |
|---|
| 1003 | #define mmPA_SC_RASTER_CONFIG 0xA0D4 |
|---|
| 1004 | #define mmPA_SC_SCREEN_SCISSOR_BR 0xA00D |
|---|
| 1005 | #define mmPA_SC_SCREEN_SCISSOR_TL 0xA00C |
|---|
| 1006 | #define mmPA_SC_VPORT_SCISSOR_0_BR 0xA095 |
|---|
| 1007 | #define mmPA_SC_VPORT_SCISSOR_0_TL 0xA094 |
|---|
| 1008 | #define mmPA_SC_VPORT_SCISSOR_10_BR 0xA0A9 |
|---|
| 1009 | #define mmPA_SC_VPORT_SCISSOR_10_TL 0xA0A8 |
|---|
| 1010 | #define mmPA_SC_VPORT_SCISSOR_11_BR 0xA0AB |
|---|
| 1011 | #define mmPA_SC_VPORT_SCISSOR_11_TL 0xA0AA |
|---|
| 1012 | #define mmPA_SC_VPORT_SCISSOR_12_BR 0xA0AD |
|---|
| 1013 | #define mmPA_SC_VPORT_SCISSOR_12_TL 0xA0AC |
|---|
| 1014 | #define mmPA_SC_VPORT_SCISSOR_13_BR 0xA0AF |
|---|
| 1015 | #define mmPA_SC_VPORT_SCISSOR_13_TL 0xA0AE |
|---|
| 1016 | #define mmPA_SC_VPORT_SCISSOR_14_BR 0xA0B1 |
|---|
| 1017 | #define mmPA_SC_VPORT_SCISSOR_14_TL 0xA0B0 |
|---|
| 1018 | #define mmPA_SC_VPORT_SCISSOR_15_BR 0xA0B3 |
|---|
| 1019 | #define mmPA_SC_VPORT_SCISSOR_15_TL 0xA0B2 |
|---|
| 1020 | #define mmPA_SC_VPORT_SCISSOR_1_BR 0xA097 |
|---|
| 1021 | #define mmPA_SC_VPORT_SCISSOR_1_TL 0xA096 |
|---|
| 1022 | #define mmPA_SC_VPORT_SCISSOR_2_BR 0xA099 |
|---|
| 1023 | #define mmPA_SC_VPORT_SCISSOR_2_TL 0xA098 |
|---|
| 1024 | #define mmPA_SC_VPORT_SCISSOR_3_BR 0xA09B |
|---|
| 1025 | #define mmPA_SC_VPORT_SCISSOR_3_TL 0xA09A |
|---|
| 1026 | #define mmPA_SC_VPORT_SCISSOR_4_BR 0xA09D |
|---|
| 1027 | #define mmPA_SC_VPORT_SCISSOR_4_TL 0xA09C |
|---|
| 1028 | #define mmPA_SC_VPORT_SCISSOR_5_BR 0xA09F |
|---|
| 1029 | #define mmPA_SC_VPORT_SCISSOR_5_TL 0xA09E |
|---|
| 1030 | #define mmPA_SC_VPORT_SCISSOR_6_BR 0xA0A1 |
|---|
| 1031 | #define mmPA_SC_VPORT_SCISSOR_6_TL 0xA0A0 |
|---|
| 1032 | #define mmPA_SC_VPORT_SCISSOR_7_BR 0xA0A3 |
|---|
| 1033 | #define mmPA_SC_VPORT_SCISSOR_7_TL 0xA0A2 |
|---|
| 1034 | #define mmPA_SC_VPORT_SCISSOR_8_BR 0xA0A5 |
|---|
| 1035 | #define mmPA_SC_VPORT_SCISSOR_8_TL 0xA0A4 |
|---|
| 1036 | #define mmPA_SC_VPORT_SCISSOR_9_BR 0xA0A7 |
|---|
| 1037 | #define mmPA_SC_VPORT_SCISSOR_9_TL 0xA0A6 |
|---|
| 1038 | #define mmPA_SC_VPORT_ZMAX_0 0xA0B5 |
|---|
| 1039 | #define mmPA_SC_VPORT_ZMAX_10 0xA0C9 |
|---|
| 1040 | #define mmPA_SC_VPORT_ZMAX_1 0xA0B7 |
|---|
| 1041 | #define mmPA_SC_VPORT_ZMAX_11 0xA0CB |
|---|
| 1042 | #define mmPA_SC_VPORT_ZMAX_12 0xA0CD |
|---|
| 1043 | #define mmPA_SC_VPORT_ZMAX_13 0xA0CF |
|---|
| 1044 | #define mmPA_SC_VPORT_ZMAX_14 0xA0D1 |
|---|
| 1045 | #define mmPA_SC_VPORT_ZMAX_15 0xA0D3 |
|---|
| 1046 | #define mmPA_SC_VPORT_ZMAX_2 0xA0B9 |
|---|
| 1047 | #define mmPA_SC_VPORT_ZMAX_3 0xA0BB |
|---|
| 1048 | #define mmPA_SC_VPORT_ZMAX_4 0xA0BD |
|---|
| 1049 | #define mmPA_SC_VPORT_ZMAX_5 0xA0BF |
|---|
| 1050 | #define mmPA_SC_VPORT_ZMAX_6 0xA0C1 |
|---|
| 1051 | #define mmPA_SC_VPORT_ZMAX_7 0xA0C3 |
|---|
| 1052 | #define mmPA_SC_VPORT_ZMAX_8 0xA0C5 |
|---|
| 1053 | #define mmPA_SC_VPORT_ZMAX_9 0xA0C7 |
|---|
| 1054 | #define mmPA_SC_VPORT_ZMIN_0 0xA0B4 |
|---|
| 1055 | #define mmPA_SC_VPORT_ZMIN_10 0xA0C8 |
|---|
| 1056 | #define mmPA_SC_VPORT_ZMIN_1 0xA0B6 |
|---|
| 1057 | #define mmPA_SC_VPORT_ZMIN_11 0xA0CA |
|---|
| 1058 | #define mmPA_SC_VPORT_ZMIN_12 0xA0CC |
|---|
| 1059 | #define mmPA_SC_VPORT_ZMIN_13 0xA0CE |
|---|
| 1060 | #define mmPA_SC_VPORT_ZMIN_14 0xA0D0 |
|---|
| 1061 | #define mmPA_SC_VPORT_ZMIN_15 0xA0D2 |
|---|
| 1062 | #define mmPA_SC_VPORT_ZMIN_2 0xA0B8 |
|---|
| 1063 | #define mmPA_SC_VPORT_ZMIN_3 0xA0BA |
|---|
| 1064 | #define mmPA_SC_VPORT_ZMIN_4 0xA0BC |
|---|
| 1065 | #define mmPA_SC_VPORT_ZMIN_5 0xA0BE |
|---|
| 1066 | #define mmPA_SC_VPORT_ZMIN_6 0xA0C0 |
|---|
| 1067 | #define mmPA_SC_VPORT_ZMIN_7 0xA0C2 |
|---|
| 1068 | #define mmPA_SC_VPORT_ZMIN_8 0xA0C4 |
|---|
| 1069 | #define mmPA_SC_VPORT_ZMIN_9 0xA0C6 |
|---|
| 1070 | #define mmPA_SC_WINDOW_OFFSET 0xA080 |
|---|
| 1071 | #define mmPA_SC_WINDOW_SCISSOR_BR 0xA082 |
|---|
| 1072 | #define mmPA_SC_WINDOW_SCISSOR_TL 0xA081 |
|---|
| 1073 | #define mmPA_SU_CNTL_STATUS 0x2294 |
|---|
| 1074 | #define mmPA_SU_DEBUG_CNTL 0x2280 |
|---|
| 1075 | #define mmPA_SU_DEBUG_DATA 0x2281 |
|---|
| 1076 | #define mmPA_SU_HARDWARE_SCREEN_OFFSET 0xA08D |
|---|
| 1077 | #define mmPA_SU_LINE_CNTL 0xA282 |
|---|
| 1078 | #define mmPA_SU_LINE_STIPPLE_CNTL 0xA209 |
|---|
| 1079 | #define mmPA_SU_LINE_STIPPLE_SCALE 0xA20A |
|---|
| 1080 | #define mmPA_SU_LINE_STIPPLE_VALUE 0x2298 |
|---|
| 1081 | #define mmPA_SU_PERFCOUNTER0_HI 0x228D |
|---|
| 1082 | #define mmPA_SU_PERFCOUNTER0_LO 0x228C |
|---|
| 1083 | #define mmPA_SU_PERFCOUNTER0_SELECT 0x2288 |
|---|
| 1084 | #define mmPA_SU_PERFCOUNTER1_HI 0x228F |
|---|
| 1085 | #define mmPA_SU_PERFCOUNTER1_LO 0x228E |
|---|
| 1086 | #define mmPA_SU_PERFCOUNTER1_SELECT 0x2289 |
|---|
| 1087 | #define mmPA_SU_PERFCOUNTER2_HI 0x2291 |
|---|
| 1088 | #define mmPA_SU_PERFCOUNTER2_LO 0x2290 |
|---|
| 1089 | #define mmPA_SU_PERFCOUNTER2_SELECT 0x228A |
|---|
| 1090 | #define mmPA_SU_PERFCOUNTER3_HI 0x2293 |
|---|
| 1091 | #define mmPA_SU_PERFCOUNTER3_LO 0x2292 |
|---|
| 1092 | #define mmPA_SU_PERFCOUNTER3_SELECT 0x228B |
|---|
| 1093 | #define mmPA_SU_POINT_MINMAX 0xA281 |
|---|
| 1094 | #define mmPA_SU_POINT_SIZE 0xA280 |
|---|
| 1095 | #define mmPA_SU_POLY_OFFSET_BACK_OFFSET 0xA2E3 |
|---|
| 1096 | #define mmPA_SU_POLY_OFFSET_BACK_SCALE 0xA2E2 |
|---|
| 1097 | #define mmPA_SU_POLY_OFFSET_CLAMP 0xA2DF |
|---|
| 1098 | #define mmPA_SU_POLY_OFFSET_DB_FMT_CNTL 0xA2DE |
|---|
| 1099 | #define mmPA_SU_POLY_OFFSET_FRONT_OFFSET 0xA2E1 |
|---|
| 1100 | #define mmPA_SU_POLY_OFFSET_FRONT_SCALE 0xA2E0 |
|---|
| 1101 | #define mmPA_SU_PRIM_FILTER_CNTL 0xA20B |
|---|
| 1102 | #define mmPA_SU_SC_MODE_CNTL 0xA205 |
|---|
| 1103 | #define mmPA_SU_VTX_CNTL 0xA2F9 |
|---|
| 1104 | #define mmRAS_BCI_SIGNATURE0 0x339E |
|---|
| 1105 | #define mmRAS_BCI_SIGNATURE1 0x339F |
|---|
| 1106 | #define mmRAS_CB_SIGNATURE0 0x339D |
|---|
| 1107 | #define mmRAS_DB_SIGNATURE0 0x338B |
|---|
| 1108 | #define mmRAS_IA_SIGNATURE0 0x3397 |
|---|
| 1109 | #define mmRAS_IA_SIGNATURE1 0x3398 |
|---|
| 1110 | #define mmRAS_PA_SIGNATURE0 0x338C |
|---|
| 1111 | #define mmRAS_SC_SIGNATURE0 0x338F |
|---|
| 1112 | #define mmRAS_SC_SIGNATURE1 0x3390 |
|---|
| 1113 | #define mmRAS_SC_SIGNATURE2 0x3391 |
|---|
| 1114 | #define mmRAS_SC_SIGNATURE3 0x3392 |
|---|
| 1115 | #define mmRAS_SC_SIGNATURE4 0x3393 |
|---|
| 1116 | #define mmRAS_SC_SIGNATURE5 0x3394 |
|---|
| 1117 | #define mmRAS_SC_SIGNATURE6 0x3395 |
|---|
| 1118 | #define mmRAS_SC_SIGNATURE7 0x3396 |
|---|
| 1119 | #define mmRAS_SIGNATURE_CONTROL 0x3380 |
|---|
| 1120 | #define mmRAS_SIGNATURE_MASK 0x3381 |
|---|
| 1121 | #define mmRAS_SPI_SIGNATURE0 0x3399 |
|---|
| 1122 | #define mmRAS_SPI_SIGNATURE1 0x339A |
|---|
| 1123 | #define mmRAS_SQ_SIGNATURE0 0x338E |
|---|
| 1124 | #define mmRAS_SX_SIGNATURE0 0x3382 |
|---|
| 1125 | #define mmRAS_SX_SIGNATURE1 0x3383 |
|---|
| 1126 | #define mmRAS_SX_SIGNATURE2 0x3384 |
|---|
| 1127 | #define mmRAS_SX_SIGNATURE3 0x3385 |
|---|
| 1128 | #define mmRAS_TA_SIGNATURE0 0x339B |
|---|
| 1129 | #define mmRAS_TD_SIGNATURE0 0x339C |
|---|
| 1130 | #define mmRAS_VGT_SIGNATURE0 0x338D |
|---|
| 1131 | #define mmRLC_AUTO_PG_CTRL 0x310D |
|---|
| 1132 | #define mmRLC_CAPTURE_GPU_CLOCK_COUNT 0x30D0 |
|---|
| 1133 | #define mmRLC_CGCG_CGLS_CTRL 0x3101 |
|---|
| 1134 | #define mmRLC_CGCG_RAMP_CTRL 0x3102 |
|---|
| 1135 | #define mmRLC_CGTT_MGCG_OVERRIDE 0x3100 |
|---|
| 1136 | #define mmRLC_CNTL 0x30C0 |
|---|
| 1137 | #define mmRLC_CU_STATUS 0x3106 |
|---|
| 1138 | #define mmRLC_DEBUG 0x30CA |
|---|
| 1139 | #define mmRLC_DEBUG_SELECT 0x30C9 |
|---|
| 1140 | #define mmRLC_DRIVER_CPDMA_STATUS 0x30C7 |
|---|
| 1141 | #define mmRLC_DYN_PG_REQUEST 0x3104 |
|---|
| 1142 | #define mmRLC_DYN_PG_STATUS 0x3103 |
|---|
| 1143 | #define mmRLC_GPU_CLOCK_32 0x30D5 |
|---|
| 1144 | #define mmRLC_GPU_CLOCK_32_RES_SEL 0x30D4 |
|---|
| 1145 | #define mmRLC_GPU_CLOCK_COUNT_LSB 0x30CE |
|---|
| 1146 | #define mmRLC_GPU_CLOCK_COUNT_MSB 0x30CF |
|---|
| 1147 | #define mmRLC_LB_ALWAYS_ACTIVE_CU_MASK 0x3108 |
|---|
| 1148 | #define mmRLC_LB_CNTL 0x30C3 |
|---|
| 1149 | #define mmRLC_LB_CNTR_INIT 0x30C6 |
|---|
| 1150 | #define mmRLC_LB_CNTR_MAX 0x30C5 |
|---|
| 1151 | #define mmRLC_LB_INIT_CU_MASK 0x3107 |
|---|
| 1152 | #define mmRLC_LB_PARAMS 0x3109 |
|---|
| 1153 | #define mmRLC_LOAD_BALANCE_CNTR 0x30F6 |
|---|
| 1154 | #define mmRLC_MAX_PG_CU 0x310C |
|---|
| 1155 | #define mmRLC_MC_CNTL 0x30D1 |
|---|
| 1156 | #define mmRLC_MEM_SLP_CNTL 0x30D8 |
|---|
| 1157 | #define mmRLC_PERFCOUNTER0_HI 0x30DC |
|---|
| 1158 | #define mmRLC_PERFCOUNTER0_LO 0x30DB |
|---|
| 1159 | #define mmRLC_PERFCOUNTER0_SELECT 0x30DA |
|---|
| 1160 | #define mmRLC_PERFCOUNTER1_HI 0x30DF |
|---|
| 1161 | #define mmRLC_PERFCOUNTER1_LO 0x30DE |
|---|
| 1162 | #define mmRLC_PERFCOUNTER1_SELECT 0x30DD |
|---|
| 1163 | #define mmRLC_PERFMON_CNTL 0x30D9 |
|---|
| 1164 | #define mmRLC_PG_ALWAYS_ON_CU_MASK 0x310B |
|---|
| 1165 | #define mmRLC_PG_CNTL 0x30D7 |
|---|
| 1166 | #define mmRLC_SAVE_AND_RESTORE_BASE 0x30C4 |
|---|
| 1167 | #define mmRLC_SERDES_RD_DATA_0 0x3112 |
|---|
| 1168 | #define mmRLC_SERDES_RD_DATA_1 0x3113 |
|---|
| 1169 | #define mmRLC_SERDES_RD_DATA_2 0x3114 |
|---|
| 1170 | #define mmRLC_SERDES_RD_MASTER_INDEX 0x3111 |
|---|
| 1171 | #define mmRLC_SERDES_WR_CTRL 0x3117 |
|---|
| 1172 | #define mmRLC_SERDES_WR_DATA 0x3118 |
|---|
| 1173 | #define mmRLC_SMU_GRBM_REG_SAVE_CTRL 0x310E |
|---|
| 1174 | #define mmRLC_SMU_PG_CTRL 0x310F |
|---|
| 1175 | #define mmRLC_SMU_PG_WAKE_UP_CTRL 0x3110 |
|---|
| 1176 | #define mmRLC_SOFT_RESET_GPU 0x30D6 |
|---|
| 1177 | #define mmRLC_STAT 0x30D3 |
|---|
| 1178 | #define mmRLC_THREAD1_DELAY 0x310A |
|---|
| 1179 | #define mmRLC_UCODE_CNTL 0x30D2 |
|---|
| 1180 | #define mmSCRATCH_ADDR 0x2151 |
|---|
| 1181 | #define mmSCRATCH_REG0 0x2140 |
|---|
| 1182 | #define mmSCRATCH_REG1 0x2141 |
|---|
| 1183 | #define mmSCRATCH_REG2 0x2142 |
|---|
| 1184 | #define mmSCRATCH_REG3 0x2143 |
|---|
| 1185 | #define mmSCRATCH_REG4 0x2144 |
|---|
| 1186 | #define mmSCRATCH_REG5 0x2145 |
|---|
| 1187 | #define mmSCRATCH_REG6 0x2146 |
|---|
| 1188 | #define mmSCRATCH_REG7 0x2147 |
|---|
| 1189 | #define mmSCRATCH_UMSK 0x2150 |
|---|
| 1190 | #define mmSPI_ARB_CYCLES_0 0x243D |
|---|
| 1191 | #define mmSPI_ARB_CYCLES_1 0x243E |
|---|
| 1192 | #define mmSPI_ARB_PRIORITY 0x243C |
|---|
| 1193 | #define mmSPI_BARYC_CNTL 0xA1B8 |
|---|
| 1194 | #define mmSPI_CONFIG_CNTL 0x2440 |
|---|
| 1195 | #define mmSPI_CONFIG_CNTL_1 0x244F |
|---|
| 1196 | #define mmSPI_DEBUG_BUSY 0x2450 |
|---|
| 1197 | #define mmSPI_DEBUG_CNTL 0x2441 |
|---|
| 1198 | #define mmSPI_DEBUG_READ 0x2442 |
|---|
| 1199 | #define mmSPI_GDS_CREDITS 0x24D8 |
|---|
| 1200 | #define mmSPI_INTERP_CONTROL_0 0xA1B5 |
|---|
| 1201 | #define mmSPI_LB_CTR_CTRL 0x24D4 |
|---|
| 1202 | #define mmSPI_LB_CU_MASK 0x24D5 |
|---|
| 1203 | #define mmSPI_LB_DATA_REG 0x24D6 |
|---|
| 1204 | #define mmSPI_PERFCOUNTER0_HI 0x2447 |
|---|
| 1205 | #define mmSPI_PERFCOUNTER0_LO 0x2448 |
|---|
| 1206 | #define mmSPI_PERFCOUNTER0_SELECT 0x2443 |
|---|
| 1207 | #define mmSPI_PERFCOUNTER1_HI 0x2449 |
|---|
| 1208 | #define mmSPI_PERFCOUNTER1_LO 0x244A |
|---|
| 1209 | #define mmSPI_PERFCOUNTER1_SELECT 0x2444 |
|---|
| 1210 | #define mmSPI_PERFCOUNTER2_HI 0x244B |
|---|
| 1211 | #define mmSPI_PERFCOUNTER2_LO 0x244C |
|---|
| 1212 | #define mmSPI_PERFCOUNTER2_SELECT 0x2445 |
|---|
| 1213 | #define mmSPI_PERFCOUNTER3_HI 0x244D |
|---|
| 1214 | #define mmSPI_PERFCOUNTER3_LO 0x244E |
|---|
| 1215 | #define mmSPI_PERFCOUNTER3_SELECT 0x2446 |
|---|
| 1216 | #define mmSPI_PERFCOUNTER_BINS 0x243F |
|---|
| 1217 | #define mmSPI_PG_ENABLE_STATIC_CU_MASK 0x24D7 |
|---|
| 1218 | #define mmSPI_PS_IN_CONTROL 0xA1B6 |
|---|
| 1219 | #define mmSPI_PS_INPUT_ADDR 0xA1B4 |
|---|
| 1220 | #define mmSPI_PS_INPUT_CNTL_0 0xA191 |
|---|
| 1221 | #define mmSPI_PS_INPUT_CNTL_10 0xA19B |
|---|
| 1222 | #define mmSPI_PS_INPUT_CNTL_1 0xA192 |
|---|
| 1223 | #define mmSPI_PS_INPUT_CNTL_11 0xA19C |
|---|
| 1224 | #define mmSPI_PS_INPUT_CNTL_12 0xA19D |
|---|
| 1225 | #define mmSPI_PS_INPUT_CNTL_13 0xA19E |
|---|
| 1226 | #define mmSPI_PS_INPUT_CNTL_14 0xA19F |
|---|
| 1227 | #define mmSPI_PS_INPUT_CNTL_15 0xA1A0 |
|---|
| 1228 | #define mmSPI_PS_INPUT_CNTL_16 0xA1A1 |
|---|
| 1229 | #define mmSPI_PS_INPUT_CNTL_17 0xA1A2 |
|---|
| 1230 | #define mmSPI_PS_INPUT_CNTL_18 0xA1A3 |
|---|
| 1231 | #define mmSPI_PS_INPUT_CNTL_19 0xA1A4 |
|---|
| 1232 | #define mmSPI_PS_INPUT_CNTL_20 0xA1A5 |
|---|
| 1233 | #define mmSPI_PS_INPUT_CNTL_2 0xA193 |
|---|
| 1234 | #define mmSPI_PS_INPUT_CNTL_21 0xA1A6 |
|---|
| 1235 | #define mmSPI_PS_INPUT_CNTL_22 0xA1A7 |
|---|
| 1236 | #define mmSPI_PS_INPUT_CNTL_23 0xA1A8 |
|---|
| 1237 | #define mmSPI_PS_INPUT_CNTL_24 0xA1A9 |
|---|
| 1238 | #define mmSPI_PS_INPUT_CNTL_25 0xA1AA |
|---|
| 1239 | #define mmSPI_PS_INPUT_CNTL_26 0xA1AB |
|---|
| 1240 | #define mmSPI_PS_INPUT_CNTL_27 0xA1AC |
|---|
| 1241 | #define mmSPI_PS_INPUT_CNTL_28 0xA1AD |
|---|
| 1242 | #define mmSPI_PS_INPUT_CNTL_29 0xA1AE |
|---|
| 1243 | #define mmSPI_PS_INPUT_CNTL_30 0xA1AF |
|---|
| 1244 | #define mmSPI_PS_INPUT_CNTL_3 0xA194 |
|---|
| 1245 | #define mmSPI_PS_INPUT_CNTL_31 0xA1B0 |
|---|
| 1246 | #define mmSPI_PS_INPUT_CNTL_4 0xA195 |
|---|
| 1247 | #define mmSPI_PS_INPUT_CNTL_5 0xA196 |
|---|
| 1248 | #define mmSPI_PS_INPUT_CNTL_6 0xA197 |
|---|
| 1249 | #define mmSPI_PS_INPUT_CNTL_7 0xA198 |
|---|
| 1250 | #define mmSPI_PS_INPUT_CNTL_8 0xA199 |
|---|
| 1251 | #define mmSPI_PS_INPUT_CNTL_9 0xA19A |
|---|
| 1252 | #define mmSPI_PS_INPUT_ENA 0xA1B3 |
|---|
| 1253 | #define mmSPI_PS_MAX_WAVE_ID 0x243B |
|---|
| 1254 | #define mmSPI_SHADER_COL_FORMAT 0xA1C5 |
|---|
| 1255 | #define mmSPI_SHADER_PGM_HI_ES 0x2CC9 |
|---|
| 1256 | #define mmSPI_SHADER_PGM_HI_GS 0x2C89 |
|---|
| 1257 | #define mmSPI_SHADER_PGM_HI_HS 0x2D09 |
|---|
| 1258 | #define mmSPI_SHADER_PGM_HI_LS 0x2D49 |
|---|
| 1259 | #define mmSPI_SHADER_PGM_HI_PS 0x2C09 |
|---|
| 1260 | #define mmSPI_SHADER_PGM_HI_VS 0x2C49 |
|---|
| 1261 | #define mmSPI_SHADER_PGM_LO_ES 0x2CC8 |
|---|
| 1262 | #define mmSPI_SHADER_PGM_LO_GS 0x2C88 |
|---|
| 1263 | #define mmSPI_SHADER_PGM_LO_HS 0x2D08 |
|---|
| 1264 | #define mmSPI_SHADER_PGM_LO_LS 0x2D48 |
|---|
| 1265 | #define mmSPI_SHADER_PGM_LO_PS 0x2C08 |
|---|
| 1266 | #define mmSPI_SHADER_PGM_LO_VS 0x2C48 |
|---|
| 1267 | #define mmSPI_SHADER_PGM_RSRC1_ES 0x2CCA |
|---|
| 1268 | #define mmSPI_SHADER_PGM_RSRC1_GS 0x2C8A |
|---|
| 1269 | #define mmSPI_SHADER_PGM_RSRC1_HS 0x2D0A |
|---|
| 1270 | #define mmSPI_SHADER_PGM_RSRC1_LS 0x2D4A |
|---|
| 1271 | #define mmSPI_SHADER_PGM_RSRC1_PS 0x2C0A |
|---|
| 1272 | #define mmSPI_SHADER_PGM_RSRC1_VS 0x2C4A |
|---|
| 1273 | #define mmSPI_SHADER_PGM_RSRC2_ES 0x2CCB |
|---|
| 1274 | #define mmSPI_SHADER_PGM_RSRC2_GS 0x2C8B |
|---|
| 1275 | #define mmSPI_SHADER_PGM_RSRC2_HS 0x2D0B |
|---|
| 1276 | #define mmSPI_SHADER_PGM_RSRC2_LS 0x2D4B |
|---|
| 1277 | #define mmSPI_SHADER_PGM_RSRC2_PS 0x2C0B |
|---|
| 1278 | #define mmSPI_SHADER_PGM_RSRC2_VS 0x2C4B |
|---|
| 1279 | #define mmSPI_SHADER_POS_FORMAT 0xA1C3 |
|---|
| 1280 | #define mmSPI_SHADER_TBA_HI_ES 0x2CC1 |
|---|
| 1281 | #define mmSPI_SHADER_TBA_HI_GS 0x2C81 |
|---|
| 1282 | #define mmSPI_SHADER_TBA_HI_HS 0x2D01 |
|---|
| 1283 | #define mmSPI_SHADER_TBA_HI_LS 0x2D41 |
|---|
| 1284 | #define mmSPI_SHADER_TBA_HI_PS 0x2C01 |
|---|
| 1285 | #define mmSPI_SHADER_TBA_HI_VS 0x2C41 |
|---|
| 1286 | #define mmSPI_SHADER_TBA_LO_ES 0x2CC0 |
|---|
| 1287 | #define mmSPI_SHADER_TBA_LO_GS 0x2C80 |
|---|
| 1288 | #define mmSPI_SHADER_TBA_LO_HS 0x2D00 |
|---|
| 1289 | #define mmSPI_SHADER_TBA_LO_LS 0x2D40 |
|---|
| 1290 | #define mmSPI_SHADER_TBA_LO_PS 0x2C00 |
|---|
| 1291 | #define mmSPI_SHADER_TBA_LO_VS 0x2C40 |
|---|
| 1292 | #define mmSPI_SHADER_TMA_HI_ES 0x2CC3 |
|---|
| 1293 | #define mmSPI_SHADER_TMA_HI_GS 0x2C83 |
|---|
| 1294 | #define mmSPI_SHADER_TMA_HI_HS 0x2D03 |
|---|
| 1295 | #define mmSPI_SHADER_TMA_HI_LS 0x2D43 |
|---|
| 1296 | #define mmSPI_SHADER_TMA_HI_PS 0x2C03 |
|---|
| 1297 | #define mmSPI_SHADER_TMA_HI_VS 0x2C43 |
|---|
| 1298 | #define mmSPI_SHADER_TMA_LO_ES 0x2CC2 |
|---|
| 1299 | #define mmSPI_SHADER_TMA_LO_GS 0x2C82 |
|---|
| 1300 | #define mmSPI_SHADER_TMA_LO_HS 0x2D02 |
|---|
| 1301 | #define mmSPI_SHADER_TMA_LO_LS 0x2D42 |
|---|
| 1302 | #define mmSPI_SHADER_TMA_LO_PS 0x2C02 |
|---|
| 1303 | #define mmSPI_SHADER_TMA_LO_VS 0x2C42 |
|---|
| 1304 | #define mmSPI_SHADER_USER_DATA_ES_0 0x2CCC |
|---|
| 1305 | #define mmSPI_SHADER_USER_DATA_ES_10 0x2CD6 |
|---|
| 1306 | #define mmSPI_SHADER_USER_DATA_ES_1 0x2CCD |
|---|
| 1307 | #define mmSPI_SHADER_USER_DATA_ES_11 0x2CD7 |
|---|
| 1308 | #define mmSPI_SHADER_USER_DATA_ES_12 0x2CD8 |
|---|
| 1309 | #define mmSPI_SHADER_USER_DATA_ES_13 0x2CD9 |
|---|
| 1310 | #define mmSPI_SHADER_USER_DATA_ES_14 0x2CDA |
|---|
| 1311 | #define mmSPI_SHADER_USER_DATA_ES_15 0x2CDB |
|---|
| 1312 | #define mmSPI_SHADER_USER_DATA_ES_2 0x2CCE |
|---|
| 1313 | #define mmSPI_SHADER_USER_DATA_ES_3 0x2CCF |
|---|
| 1314 | #define mmSPI_SHADER_USER_DATA_ES_4 0x2CD0 |
|---|
| 1315 | #define mmSPI_SHADER_USER_DATA_ES_5 0x2CD1 |
|---|
| 1316 | #define mmSPI_SHADER_USER_DATA_ES_6 0x2CD2 |
|---|
| 1317 | #define mmSPI_SHADER_USER_DATA_ES_7 0x2CD3 |
|---|
| 1318 | #define mmSPI_SHADER_USER_DATA_ES_8 0x2CD4 |
|---|
| 1319 | #define mmSPI_SHADER_USER_DATA_ES_9 0x2CD5 |
|---|
| 1320 | #define mmSPI_SHADER_USER_DATA_GS_0 0x2C8C |
|---|
| 1321 | #define mmSPI_SHADER_USER_DATA_GS_10 0x2C96 |
|---|
| 1322 | #define mmSPI_SHADER_USER_DATA_GS_1 0x2C8D |
|---|
| 1323 | #define mmSPI_SHADER_USER_DATA_GS_11 0x2C97 |
|---|
| 1324 | #define mmSPI_SHADER_USER_DATA_GS_12 0x2C98 |
|---|
| 1325 | #define mmSPI_SHADER_USER_DATA_GS_13 0x2C99 |
|---|
| 1326 | #define mmSPI_SHADER_USER_DATA_GS_14 0x2C9A |
|---|
| 1327 | #define mmSPI_SHADER_USER_DATA_GS_15 0x2C9B |
|---|
| 1328 | #define mmSPI_SHADER_USER_DATA_GS_2 0x2C8E |
|---|
| 1329 | #define mmSPI_SHADER_USER_DATA_GS_3 0x2C8F |
|---|
| 1330 | #define mmSPI_SHADER_USER_DATA_GS_4 0x2C90 |
|---|
| 1331 | #define mmSPI_SHADER_USER_DATA_GS_5 0x2C91 |
|---|
| 1332 | #define mmSPI_SHADER_USER_DATA_GS_6 0x2C92 |
|---|
| 1333 | #define mmSPI_SHADER_USER_DATA_GS_7 0x2C93 |
|---|
| 1334 | #define mmSPI_SHADER_USER_DATA_GS_8 0x2C94 |
|---|
| 1335 | #define mmSPI_SHADER_USER_DATA_GS_9 0x2C95 |
|---|
| 1336 | #define mmSPI_SHADER_USER_DATA_HS_0 0x2D0C |
|---|
| 1337 | #define mmSPI_SHADER_USER_DATA_HS_10 0x2D16 |
|---|
| 1338 | #define mmSPI_SHADER_USER_DATA_HS_1 0x2D0D |
|---|
| 1339 | #define mmSPI_SHADER_USER_DATA_HS_11 0x2D17 |
|---|
| 1340 | #define mmSPI_SHADER_USER_DATA_HS_12 0x2D18 |
|---|
| 1341 | #define mmSPI_SHADER_USER_DATA_HS_13 0x2D19 |
|---|
| 1342 | #define mmSPI_SHADER_USER_DATA_HS_14 0x2D1A |
|---|
| 1343 | #define mmSPI_SHADER_USER_DATA_HS_15 0x2D1B |
|---|
| 1344 | #define mmSPI_SHADER_USER_DATA_HS_2 0x2D0E |
|---|
| 1345 | #define mmSPI_SHADER_USER_DATA_HS_3 0x2D0F |
|---|
| 1346 | #define mmSPI_SHADER_USER_DATA_HS_4 0x2D10 |
|---|
| 1347 | #define mmSPI_SHADER_USER_DATA_HS_5 0x2D11 |
|---|
| 1348 | #define mmSPI_SHADER_USER_DATA_HS_6 0x2D12 |
|---|
| 1349 | #define mmSPI_SHADER_USER_DATA_HS_7 0x2D13 |
|---|
| 1350 | #define mmSPI_SHADER_USER_DATA_HS_8 0x2D14 |
|---|
| 1351 | #define mmSPI_SHADER_USER_DATA_HS_9 0x2D15 |
|---|
| 1352 | #define mmSPI_SHADER_USER_DATA_LS_0 0x2D4C |
|---|
| 1353 | #define mmSPI_SHADER_USER_DATA_LS_10 0x2D56 |
|---|
| 1354 | #define mmSPI_SHADER_USER_DATA_LS_1 0x2D4D |
|---|
| 1355 | #define mmSPI_SHADER_USER_DATA_LS_11 0x2D57 |
|---|
| 1356 | #define mmSPI_SHADER_USER_DATA_LS_12 0x2D58 |
|---|
| 1357 | #define mmSPI_SHADER_USER_DATA_LS_13 0x2D59 |
|---|
| 1358 | #define mmSPI_SHADER_USER_DATA_LS_14 0x2D5A |
|---|
| 1359 | #define mmSPI_SHADER_USER_DATA_LS_15 0x2D5B |
|---|
| 1360 | #define mmSPI_SHADER_USER_DATA_LS_2 0x2D4E |
|---|
| 1361 | #define mmSPI_SHADER_USER_DATA_LS_3 0x2D4F |
|---|
| 1362 | #define mmSPI_SHADER_USER_DATA_LS_4 0x2D50 |
|---|
| 1363 | #define mmSPI_SHADER_USER_DATA_LS_5 0x2D51 |
|---|
| 1364 | #define mmSPI_SHADER_USER_DATA_LS_6 0x2D52 |
|---|
| 1365 | #define mmSPI_SHADER_USER_DATA_LS_7 0x2D53 |
|---|
| 1366 | #define mmSPI_SHADER_USER_DATA_LS_8 0x2D54 |
|---|
| 1367 | #define mmSPI_SHADER_USER_DATA_LS_9 0x2D55 |
|---|
| 1368 | #define mmSPI_SHADER_USER_DATA_PS_0 0x2C0C |
|---|
| 1369 | #define mmSPI_SHADER_USER_DATA_PS_10 0x2C16 |
|---|
| 1370 | #define mmSPI_SHADER_USER_DATA_PS_1 0x2C0D |
|---|
| 1371 | #define mmSPI_SHADER_USER_DATA_PS_11 0x2C17 |
|---|
| 1372 | #define mmSPI_SHADER_USER_DATA_PS_12 0x2C18 |
|---|
| 1373 | #define mmSPI_SHADER_USER_DATA_PS_13 0x2C19 |
|---|
| 1374 | #define mmSPI_SHADER_USER_DATA_PS_14 0x2C1A |
|---|
| 1375 | #define mmSPI_SHADER_USER_DATA_PS_15 0x2C1B |
|---|
| 1376 | #define mmSPI_SHADER_USER_DATA_PS_2 0x2C0E |
|---|
| 1377 | #define mmSPI_SHADER_USER_DATA_PS_3 0x2C0F |
|---|
| 1378 | #define mmSPI_SHADER_USER_DATA_PS_4 0x2C10 |
|---|
| 1379 | #define mmSPI_SHADER_USER_DATA_PS_5 0x2C11 |
|---|
| 1380 | #define mmSPI_SHADER_USER_DATA_PS_6 0x2C12 |
|---|
| 1381 | #define mmSPI_SHADER_USER_DATA_PS_7 0x2C13 |
|---|
| 1382 | #define mmSPI_SHADER_USER_DATA_PS_8 0x2C14 |
|---|
| 1383 | #define mmSPI_SHADER_USER_DATA_PS_9 0x2C15 |
|---|
| 1384 | #define mmSPI_SHADER_USER_DATA_VS_0 0x2C4C |
|---|
| 1385 | #define mmSPI_SHADER_USER_DATA_VS_10 0x2C56 |
|---|
| 1386 | #define mmSPI_SHADER_USER_DATA_VS_1 0x2C4D |
|---|
| 1387 | #define mmSPI_SHADER_USER_DATA_VS_11 0x2C57 |
|---|
| 1388 | #define mmSPI_SHADER_USER_DATA_VS_12 0x2C58 |
|---|
| 1389 | #define mmSPI_SHADER_USER_DATA_VS_13 0x2C59 |
|---|
| 1390 | #define mmSPI_SHADER_USER_DATA_VS_14 0x2C5A |
|---|
| 1391 | #define mmSPI_SHADER_USER_DATA_VS_15 0x2C5B |
|---|
| 1392 | #define mmSPI_SHADER_USER_DATA_VS_2 0x2C4E |
|---|
| 1393 | #define mmSPI_SHADER_USER_DATA_VS_3 0x2C4F |
|---|
| 1394 | #define mmSPI_SHADER_USER_DATA_VS_4 0x2C50 |
|---|
| 1395 | #define mmSPI_SHADER_USER_DATA_VS_5 0x2C51 |
|---|
| 1396 | #define mmSPI_SHADER_USER_DATA_VS_6 0x2C52 |
|---|
| 1397 | #define mmSPI_SHADER_USER_DATA_VS_7 0x2C53 |
|---|
| 1398 | #define mmSPI_SHADER_USER_DATA_VS_8 0x2C54 |
|---|
| 1399 | #define mmSPI_SHADER_USER_DATA_VS_9 0x2C55 |
|---|
| 1400 | #define mmSPI_SHADER_Z_FORMAT 0xA1C4 |
|---|
| 1401 | #define mmSPI_SLAVE_DEBUG_BUSY 0x24D3 |
|---|
| 1402 | #define mmSPI_SX_EXPORT_BUFFER_SIZES 0x24D9 |
|---|
| 1403 | #define mmSPI_SX_SCOREBOARD_BUFFER_SIZES 0x24DA |
|---|
| 1404 | #define mmSPI_TMPRING_SIZE 0xA1BA |
|---|
| 1405 | #define mmSPI_VS_OUT_CONFIG 0xA1B1 |
|---|
| 1406 | #define mmSQ_ALU_CLK_CTRL 0x2360 |
|---|
| 1407 | #define mmSQ_BUF_RSRC_WORD0 0x23C0 |
|---|
| 1408 | #define mmSQ_BUF_RSRC_WORD1 0x23C1 |
|---|
| 1409 | #define mmSQ_BUF_RSRC_WORD2 0x23C2 |
|---|
| 1410 | #define mmSQ_BUF_RSRC_WORD3 0x23C3 |
|---|
| 1411 | #define mmSQC_CACHES 0x2302 |
|---|
| 1412 | #define mmSQC_CONFIG 0x2301 |
|---|
| 1413 | #define mmSQ_CONFIG 0x2300 |
|---|
| 1414 | #define mmSQC_SECDED_CNT 0x23A0 |
|---|
| 1415 | #define mmSQ_DEBUG_STS_GLOBAL 0x2309 |
|---|
| 1416 | #define mmSQ_DED_CNT 0x23A2 |
|---|
| 1417 | #define mmSQ_DED_INFO 0x23A3 |
|---|
| 1418 | #define mmSQ_DS_0 0x237F |
|---|
| 1419 | #define mmSQ_DS_1 0x237F |
|---|
| 1420 | #define mmSQ_EXP_0 0x237F |
|---|
| 1421 | #define mmSQ_EXP_1 0x237F |
|---|
| 1422 | #define mmSQ_FIFO_SIZES 0x2305 |
|---|
| 1423 | #define mmSQ_IMG_RSRC_WORD0 0x23C4 |
|---|
| 1424 | #define mmSQ_IMG_RSRC_WORD1 0x23C5 |
|---|
| 1425 | #define mmSQ_IMG_RSRC_WORD2 0x23C6 |
|---|
| 1426 | #define mmSQ_IMG_RSRC_WORD3 0x23C7 |
|---|
| 1427 | #define mmSQ_IMG_RSRC_WORD4 0x23C8 |
|---|
| 1428 | #define mmSQ_IMG_RSRC_WORD5 0x23C9 |
|---|
| 1429 | #define mmSQ_IMG_RSRC_WORD6 0x23CA |
|---|
| 1430 | #define mmSQ_IMG_RSRC_WORD7 0x23CB |
|---|
| 1431 | #define mmSQ_IMG_SAMP_WORD0 0x23CC |
|---|
| 1432 | #define mmSQ_IMG_SAMP_WORD1 0x23CD |
|---|
| 1433 | #define mmSQ_IMG_SAMP_WORD2 0x23CE |
|---|
| 1434 | #define mmSQ_IMG_SAMP_WORD3 0x23CF |
|---|
| 1435 | #define mmSQ_IND_CMD 0x237A |
|---|
| 1436 | #define mmSQ_IND_DATA 0x2379 |
|---|
| 1437 | #define mmSQ_IND_INDEX 0x2378 |
|---|
| 1438 | #define mmSQ_INST 0x237F |
|---|
| 1439 | #define mmSQ_LB_CTR_CTRL 0x2398 |
|---|
| 1440 | #define mmSQ_LB_DATA_ALU_CYCLES 0x2399 |
|---|
| 1441 | #define mmSQ_LB_DATA_ALU_STALLS 0x239B |
|---|
| 1442 | #define mmSQ_LB_DATA_TEX_CYCLES 0x239A |
|---|
| 1443 | #define mmSQ_LB_DATA_TEX_STALLS 0x239C |
|---|
| 1444 | #define mmSQ_MIMG_0 0x237F |
|---|
| 1445 | #define mmSQ_MIMG_1 0x237F |
|---|
| 1446 | #define mmSQ_MTBUF_0 0x237F |
|---|
| 1447 | #define mmSQ_MTBUF_1 0x237F |
|---|
| 1448 | #define mmSQ_MUBUF_0 0x237F |
|---|
| 1449 | #define mmSQ_MUBUF_1 0x237F |
|---|
| 1450 | #define mmSQ_PERFCOUNTER0_HI 0x2321 |
|---|
| 1451 | #define mmSQ_PERFCOUNTER0_LO 0x2320 |
|---|
| 1452 | #define mmSQ_PERFCOUNTER0_SELECT 0x2340 |
|---|
| 1453 | #define mmSQ_PERFCOUNTER10_HI 0x2335 |
|---|
| 1454 | #define mmSQ_PERFCOUNTER10_LO 0x2334 |
|---|
| 1455 | #define mmSQ_PERFCOUNTER10_SELECT 0x234A |
|---|
| 1456 | #define mmSQ_PERFCOUNTER11_HI 0x2337 |
|---|
| 1457 | #define mmSQ_PERFCOUNTER11_LO 0x2336 |
|---|
| 1458 | #define mmSQ_PERFCOUNTER11_SELECT 0x234B |
|---|
| 1459 | #define mmSQ_PERFCOUNTER12_HI 0x2339 |
|---|
| 1460 | #define mmSQ_PERFCOUNTER12_LO 0x2338 |
|---|
| 1461 | #define mmSQ_PERFCOUNTER12_SELECT 0x234C |
|---|
| 1462 | #define mmSQ_PERFCOUNTER13_HI 0x233B |
|---|
| 1463 | #define mmSQ_PERFCOUNTER13_LO 0x233A |
|---|
| 1464 | #define mmSQ_PERFCOUNTER13_SELECT 0x234D |
|---|
| 1465 | #define mmSQ_PERFCOUNTER14_HI 0x233D |
|---|
| 1466 | #define mmSQ_PERFCOUNTER14_LO 0x233C |
|---|
| 1467 | #define mmSQ_PERFCOUNTER14_SELECT 0x234E |
|---|
| 1468 | #define mmSQ_PERFCOUNTER15_HI 0x233F |
|---|
| 1469 | #define mmSQ_PERFCOUNTER15_LO 0x233E |
|---|
| 1470 | #define mmSQ_PERFCOUNTER15_SELECT 0x234F |
|---|
| 1471 | #define mmSQ_PERFCOUNTER1_HI 0x2323 |
|---|
| 1472 | #define mmSQ_PERFCOUNTER1_LO 0x2322 |
|---|
| 1473 | #define mmSQ_PERFCOUNTER1_SELECT 0x2341 |
|---|
| 1474 | #define mmSQ_PERFCOUNTER2_HI 0x2325 |
|---|
| 1475 | #define mmSQ_PERFCOUNTER2_LO 0x2324 |
|---|
| 1476 | #define mmSQ_PERFCOUNTER2_SELECT 0x2342 |
|---|
| 1477 | #define mmSQ_PERFCOUNTER3_HI 0x2327 |
|---|
| 1478 | #define mmSQ_PERFCOUNTER3_LO 0x2326 |
|---|
| 1479 | #define mmSQ_PERFCOUNTER3_SELECT 0x2343 |
|---|
| 1480 | #define mmSQ_PERFCOUNTER4_HI 0x2329 |
|---|
| 1481 | #define mmSQ_PERFCOUNTER4_LO 0x2328 |
|---|
| 1482 | #define mmSQ_PERFCOUNTER4_SELECT 0x2344 |
|---|
| 1483 | #define mmSQ_PERFCOUNTER5_HI 0x232B |
|---|
| 1484 | #define mmSQ_PERFCOUNTER5_LO 0x232A |
|---|
| 1485 | #define mmSQ_PERFCOUNTER5_SELECT 0x2345 |
|---|
| 1486 | #define mmSQ_PERFCOUNTER6_HI 0x232D |
|---|
| 1487 | #define mmSQ_PERFCOUNTER6_LO 0x232C |
|---|
| 1488 | #define mmSQ_PERFCOUNTER6_SELECT 0x2346 |
|---|
| 1489 | #define mmSQ_PERFCOUNTER7_HI 0x232F |
|---|
| 1490 | #define mmSQ_PERFCOUNTER7_LO 0x232E |
|---|
| 1491 | #define mmSQ_PERFCOUNTER7_SELECT 0x2347 |
|---|
| 1492 | #define mmSQ_PERFCOUNTER8_HI 0x2331 |
|---|
| 1493 | #define mmSQ_PERFCOUNTER8_LO 0x2330 |
|---|
| 1494 | #define mmSQ_PERFCOUNTER8_SELECT 0x2348 |
|---|
| 1495 | #define mmSQ_PERFCOUNTER9_HI 0x2333 |
|---|
| 1496 | #define mmSQ_PERFCOUNTER9_LO 0x2332 |
|---|
| 1497 | #define mmSQ_PERFCOUNTER9_SELECT 0x2349 |
|---|
| 1498 | #define mmSQ_PERFCOUNTER_CTRL 0x2306 |
|---|
| 1499 | #define mmSQ_POWER_THROTTLE 0x2396 |
|---|
| 1500 | #define mmSQ_POWER_THROTTLE2 0x2397 |
|---|
| 1501 | #define mmSQ_RANDOM_WAVE_PRI 0x2303 |
|---|
| 1502 | #define mmSQ_REG_CREDITS 0x2304 |
|---|
| 1503 | #define mmSQ_SEC_CNT 0x23A1 |
|---|
| 1504 | #define mmSQ_SMRD 0x237F |
|---|
| 1505 | #define mmSQ_SOP1 0x237F |
|---|
| 1506 | #define mmSQ_SOP2 0x237F |
|---|
| 1507 | #define mmSQ_SOPC 0x237F |
|---|
| 1508 | #define mmSQ_SOPK 0x237F |
|---|
| 1509 | #define mmSQ_SOPP 0x237F |
|---|
| 1510 | #define mmSQ_TEX_CLK_CTRL 0x2361 |
|---|
| 1511 | #define mmSQ_THREAD_TRACE_BASE 0x2380 |
|---|
| 1512 | #define mmSQ_THREAD_TRACE_CNTR 0x2390 |
|---|
| 1513 | #define mmSQ_THREAD_TRACE_CTRL 0x238F |
|---|
| 1514 | #define mmSQ_THREAD_TRACE_HIWATER 0x2392 |
|---|
| 1515 | #define mmSQ_THREAD_TRACE_MASK 0x2382 |
|---|
| 1516 | #define mmSQ_THREAD_TRACE_MODE 0x238E |
|---|
| 1517 | #define mmSQ_THREAD_TRACE_PERF_MASK 0x2384 |
|---|
| 1518 | #define mmSQ_THREAD_TRACE_SIZE 0x2381 |
|---|
| 1519 | #define mmSQ_THREAD_TRACE_STATUS 0x238D |
|---|
| 1520 | #define mmSQ_THREAD_TRACE_TOKEN_MASK 0x2383 |
|---|
| 1521 | #define mmSQ_THREAD_TRACE_USERDATA_0 0x2388 |
|---|
| 1522 | #define mmSQ_THREAD_TRACE_USERDATA_1 0x2389 |
|---|
| 1523 | #define mmSQ_THREAD_TRACE_USERDATA_2 0x238A |
|---|
| 1524 | #define mmSQ_THREAD_TRACE_USERDATA_3 0x238B |
|---|
| 1525 | #define mmSQ_THREAD_TRACE_WORD_CMN 0x23B0 |
|---|
| 1526 | #define mmSQ_THREAD_TRACE_WORD_EVENT 0x23B0 |
|---|
| 1527 | #define mmSQ_THREAD_TRACE_WORD_INST 0x23B0 |
|---|
| 1528 | #define mmSQ_THREAD_TRACE_WORD_INST_PC_1_OF_2 0x23B0 |
|---|
| 1529 | #define mmSQ_THREAD_TRACE_WORD_INST_PC_2_OF_2 0x23B1 |
|---|
| 1530 | #define mmSQ_THREAD_TRACE_WORD_INST_USERDATA_1_OF_2 0x23B0 |
|---|
| 1531 | #define mmSQ_THREAD_TRACE_WORD_INST_USERDATA_2_OF_2 0x23B1 |
|---|
| 1532 | #define mmSQ_THREAD_TRACE_WORD_ISSUE 0x23B0 |
|---|
| 1533 | #define mmSQ_THREAD_TRACE_WORD_MISC 0x23B0 |
|---|
| 1534 | #define mmSQ_THREAD_TRACE_WORD_PERF_1_OF_2 0x23B0 |
|---|
| 1535 | #define mmSQ_THREAD_TRACE_WORD_PERF_2_OF_2 0x23B1 |
|---|
| 1536 | #define mmSQ_THREAD_TRACE_WORD_REG_1_OF_2 0x23B0 |
|---|
| 1537 | #define mmSQ_THREAD_TRACE_WORD_REG_2_OF_2 0x23B0 |
|---|
| 1538 | #define mmSQ_THREAD_TRACE_WORD_TIME 0x23B0 |
|---|
| 1539 | #define mmSQ_THREAD_TRACE_WORD_TIMESTAMP_1_OF_2 0x23B0 |
|---|
| 1540 | #define mmSQ_THREAD_TRACE_WORD_TIMESTAMP_2_OF_2 0x23B1 |
|---|
| 1541 | #define mmSQ_THREAD_TRACE_WORD_WAVE 0x23B0 |
|---|
| 1542 | #define mmSQ_THREAD_TRACE_WORD_WAVE_START 0x23B0 |
|---|
| 1543 | #define mmSQ_THREAD_TRACE_WPTR 0x238C |
|---|
| 1544 | #define mmSQ_TIME_HI 0x237C |
|---|
| 1545 | #define mmSQ_TIME_LO 0x237D |
|---|
| 1546 | #define mmSQ_VINTRP 0x237F |
|---|
| 1547 | #define mmSQ_VOP1 0x237F |
|---|
| 1548 | #define mmSQ_VOP2 0x237F |
|---|
| 1549 | #define mmSQ_VOP3_0 0x237F |
|---|
| 1550 | #define mmSQ_VOP3_0_SDST_ENC 0x237F |
|---|
| 1551 | #define mmSQ_VOP3_1 0x237F |
|---|
| 1552 | #define mmSQ_VOPC 0x237F |
|---|
| 1553 | #define mmSX_DEBUG_1 0x2418 |
|---|
| 1554 | #define mmSX_DEBUG_BUSY 0x2414 |
|---|
| 1555 | #define mmSX_DEBUG_BUSY_2 0x2415 |
|---|
| 1556 | #define mmSX_DEBUG_BUSY_3 0x2416 |
|---|
| 1557 | #define mmSX_DEBUG_BUSY_4 0x2417 |
|---|
| 1558 | #define mmSX_PERFCOUNTER0_HI 0x2421 |
|---|
| 1559 | #define mmSX_PERFCOUNTER0_LO 0x2420 |
|---|
| 1560 | #define mmSX_PERFCOUNTER0_SELECT 0x241C |
|---|
| 1561 | #define mmSX_PERFCOUNTER1_HI 0x2423 |
|---|
| 1562 | #define mmSX_PERFCOUNTER1_LO 0x2422 |
|---|
| 1563 | #define mmSX_PERFCOUNTER1_SELECT 0x241D |
|---|
| 1564 | #define mmSX_PERFCOUNTER2_HI 0x2425 |
|---|
| 1565 | #define mmSX_PERFCOUNTER2_LO 0x2424 |
|---|
| 1566 | #define mmSX_PERFCOUNTER2_SELECT 0x241E |
|---|
| 1567 | #define mmSX_PERFCOUNTER3_HI 0x2427 |
|---|
| 1568 | #define mmSX_PERFCOUNTER3_LO 0x2426 |
|---|
| 1569 | #define mmSX_PERFCOUNTER3_SELECT 0x241F |
|---|
| 1570 | #define mmTA_BC_BASE_ADDR 0xA020 |
|---|
| 1571 | #define mmTA_CGTT_CTRL 0x2544 |
|---|
| 1572 | #define mmTA_CNTL 0x2541 |
|---|
| 1573 | #define mmTA_CNTL_AUX 0x2542 |
|---|
| 1574 | #define mmTA_CS_BC_BASE_ADDR 0x2543 |
|---|
| 1575 | #define mmTA_DEBUG_DATA 0x254D |
|---|
| 1576 | #define mmTA_DEBUG_INDEX 0x254C |
|---|
| 1577 | #define mmTA_PERFCOUNTER0_HI 0x2556 |
|---|
| 1578 | #define mmTA_PERFCOUNTER0_LO 0x2555 |
|---|
| 1579 | #define mmTA_PERFCOUNTER0_SELECT 0x2554 |
|---|
| 1580 | #define mmTA_PERFCOUNTER1_HI 0x2562 |
|---|
| 1581 | #define mmTA_PERFCOUNTER1_LO 0x2561 |
|---|
| 1582 | #define mmTA_PERFCOUNTER1_SELECT 0x2560 |
|---|
| 1583 | #define mmTA_SCRATCH 0x2564 |
|---|
| 1584 | #define mmTA_STATUS 0x2548 |
|---|
| 1585 | #define mmTCA_CGTT_SCLK_CTRL 0x2BC1 |
|---|
| 1586 | #define mmTCA_CTRL 0x2BC0 |
|---|
| 1587 | #define mmTCA_PERFCOUNTER0_HI 0x2BD2 |
|---|
| 1588 | #define mmTCA_PERFCOUNTER0_LO 0x2BD1 |
|---|
| 1589 | #define mmTCA_PERFCOUNTER0_SELECT 0x2BD0 |
|---|
| 1590 | #define mmTCA_PERFCOUNTER1_HI 0x2BD5 |
|---|
| 1591 | #define mmTCA_PERFCOUNTER1_LO 0x2BD4 |
|---|
| 1592 | #define mmTCA_PERFCOUNTER1_SELECT 0x2BD3 |
|---|
| 1593 | #define mmTCA_PERFCOUNTER2_HI 0x2BD8 |
|---|
| 1594 | #define mmTCA_PERFCOUNTER2_LO 0x2BD7 |
|---|
| 1595 | #define mmTCA_PERFCOUNTER2_SELECT 0x2BD6 |
|---|
| 1596 | #define mmTCA_PERFCOUNTER3_HI 0x2BDB |
|---|
| 1597 | #define mmTCA_PERFCOUNTER3_LO 0x2BDA |
|---|
| 1598 | #define mmTCA_PERFCOUNTER3_SELECT 0x2BD9 |
|---|
| 1599 | #define mmTCC_CGTT_SCLK_CTRL 0x2B81 |
|---|
| 1600 | #define mmTCC_CTRL 0x2B80 |
|---|
| 1601 | #define mmTCC_EDC_COUNTER 0x2B82 |
|---|
| 1602 | #define mmTCC_PERFCOUNTER0_HI 0x2B92 |
|---|
| 1603 | #define mmTCC_PERFCOUNTER0_LO 0x2B91 |
|---|
| 1604 | #define mmTCC_PERFCOUNTER0_SELECT 0x2B90 |
|---|
| 1605 | #define mmTCC_PERFCOUNTER1_HI 0x2B95 |
|---|
| 1606 | #define mmTCC_PERFCOUNTER1_LO 0x2B94 |
|---|
| 1607 | #define mmTCC_PERFCOUNTER1_SELECT 0x2B93 |
|---|
| 1608 | #define mmTCC_PERFCOUNTER2_HI 0x2B98 |
|---|
| 1609 | #define mmTCC_PERFCOUNTER2_LO 0x2B97 |
|---|
| 1610 | #define mmTCC_PERFCOUNTER2_SELECT 0x2B96 |
|---|
| 1611 | #define mmTCC_PERFCOUNTER3_HI 0x2B9B |
|---|
| 1612 | #define mmTCC_PERFCOUNTER3_LO 0x2B9A |
|---|
| 1613 | #define mmTCC_PERFCOUNTER3_SELECT 0x2B99 |
|---|
| 1614 | #define mmTCI_CNTL_1 0x2B62 |
|---|
| 1615 | #define mmTCI_CNTL_2 0x2B63 |
|---|
| 1616 | #define mmTCI_STATUS 0x2B61 |
|---|
| 1617 | #define mmTCP_ADDR_CONFIG 0x2B05 |
|---|
| 1618 | #define mmTCP_BUFFER_ADDR_HASH_CNTL 0x2B16 |
|---|
| 1619 | #define mmTCP_CHAN_STEER_HI 0x2B04 |
|---|
| 1620 | #define mmTCP_CHAN_STEER_LO 0x2B03 |
|---|
| 1621 | #define mmTCP_CNTL 0x2B02 |
|---|
| 1622 | #define mmTCP_CREDIT 0x2B06 |
|---|
| 1623 | #define mmTCP_EDC_COUNTER 0x2B17 |
|---|
| 1624 | #define mmTCP_INVALIDATE 0x2B00 |
|---|
| 1625 | #define mmTCP_PERFCOUNTER0_HI 0x2B0A |
|---|
| 1626 | #define mmTCP_PERFCOUNTER0_LO 0x2B0B |
|---|
| 1627 | #define mmTCP_PERFCOUNTER0_SELECT 0x2B09 |
|---|
| 1628 | #define mmTCP_PERFCOUNTER1_HI 0x2B0D |
|---|
| 1629 | #define mmTCP_PERFCOUNTER1_LO 0x2B0E |
|---|
| 1630 | #define mmTCP_PERFCOUNTER1_SELECT 0x2B0C |
|---|
| 1631 | #define mmTCP_PERFCOUNTER2_HI 0x2B10 |
|---|
| 1632 | #define mmTCP_PERFCOUNTER2_LO 0x2B11 |
|---|
| 1633 | #define mmTCP_PERFCOUNTER2_SELECT 0x2B0F |
|---|
| 1634 | #define mmTCP_PERFCOUNTER3_HI 0x2B13 |
|---|
| 1635 | #define mmTCP_PERFCOUNTER3_LO 0x2B14 |
|---|
| 1636 | #define mmTCP_PERFCOUNTER3_SELECT 0x2B12 |
|---|
| 1637 | #define mmTCP_STATUS 0x2B01 |
|---|
| 1638 | #define mmTD_CGTT_CTRL 0x2527 |
|---|
| 1639 | #define mmTD_CNTL 0x2525 |
|---|
| 1640 | #define mmTD_DEBUG_DATA 0x2529 |
|---|
| 1641 | #define mmTD_DEBUG_INDEX 0x2528 |
|---|
| 1642 | #define mmTD_PERFCOUNTER0_HI 0x252E |
|---|
| 1643 | #define mmTD_PERFCOUNTER0_LO 0x252D |
|---|
| 1644 | #define mmTD_PERFCOUNTER0_SELECT 0x252C |
|---|
| 1645 | #define mmTD_SCRATCH 0x2530 |
|---|
| 1646 | #define mmTD_STATUS 0x2526 |
|---|
| 1647 | #define mmUSER_SQC_BANK_DISABLE 0x2308 |
|---|
| 1648 | #define mmVGT_CACHE_INVALIDATION 0x2231 |
|---|
| 1649 | #define mmVGT_CNTL_STATUS 0x223C |
|---|
| 1650 | #define mmVGT_DEBUG_CNTL 0x2238 |
|---|
| 1651 | #define mmVGT_DEBUG_DATA 0x2239 |
|---|
| 1652 | #define mmVGT_DMA_BASE 0xA1FA |
|---|
| 1653 | #define mmVGT_DMA_BASE_HI 0xA1F9 |
|---|
| 1654 | #define mmVGT_DMA_DATA_FIFO_DEPTH 0x222D |
|---|
| 1655 | #define mmVGT_DMA_INDEX_TYPE 0xA29F |
|---|
| 1656 | #define mmVGT_DMA_MAX_SIZE 0xA29E |
|---|
| 1657 | #define mmVGT_DMA_NUM_INSTANCES 0xA2A2 |
|---|
| 1658 | #define mmVGT_DMA_REQ_FIFO_DEPTH 0x222E |
|---|
| 1659 | #define mmVGT_DMA_SIZE 0xA29D |
|---|
| 1660 | #define mmVGT_DRAW_INIT_FIFO_DEPTH 0x222F |
|---|
| 1661 | #define mmVGT_DRAW_INITIATOR 0xA1FC |
|---|
| 1662 | #define mmVGT_ENHANCE 0xA294 |
|---|
| 1663 | #define mmVGT_ESGS_RING_ITEMSIZE 0xA2AB |
|---|
| 1664 | #define mmVGT_ESGS_RING_SIZE 0x2232 |
|---|
| 1665 | #define mmVGT_ES_PER_GS 0xA296 |
|---|
| 1666 | #define mmVGT_EVENT_ADDRESS_REG 0xA1FE |
|---|
| 1667 | #define mmVGT_EVENT_INITIATOR 0xA2A4 |
|---|
| 1668 | #define mmVGT_FIFO_DEPTHS 0x2234 |
|---|
| 1669 | #define mmVGT_GROUP_DECR 0xA28B |
|---|
| 1670 | #define mmVGT_GROUP_FIRST_DECR 0xA28A |
|---|
| 1671 | #define mmVGT_GROUP_PRIM_TYPE 0xA289 |
|---|
| 1672 | #define mmVGT_GROUP_VECT_0_CNTL 0xA28C |
|---|
| 1673 | #define mmVGT_GROUP_VECT_0_FMT_CNTL 0xA28E |
|---|
| 1674 | #define mmVGT_GROUP_VECT_1_CNTL 0xA28D |
|---|
| 1675 | #define mmVGT_GROUP_VECT_1_FMT_CNTL 0xA28F |
|---|
| 1676 | #define mmVGT_GS_INSTANCE_CNT 0xA2E4 |
|---|
| 1677 | #define mmVGT_GS_MAX_VERT_OUT 0xA2CE |
|---|
| 1678 | #define mmVGT_GS_MODE 0xA290 |
|---|
| 1679 | #define mmVGT_GS_OUT_PRIM_TYPE 0xA29B |
|---|
| 1680 | #define mmVGT_GS_PER_ES 0xA295 |
|---|
| 1681 | #define mmVGT_GS_PER_VS 0xA297 |
|---|
| 1682 | #define mmVGT_GS_VERTEX_REUSE 0x2235 |
|---|
| 1683 | #define mmVGT_GS_VERT_ITEMSIZE 0xA2D7 |
|---|
| 1684 | #define mmVGT_GS_VERT_ITEMSIZE_1 0xA2D8 |
|---|
| 1685 | #define mmVGT_GS_VERT_ITEMSIZE_2 0xA2D9 |
|---|
| 1686 | #define mmVGT_GS_VERT_ITEMSIZE_3 0xA2DA |
|---|
| 1687 | #define mmVGT_GSVS_RING_ITEMSIZE 0xA2AC |
|---|
| 1688 | #define mmVGT_GSVS_RING_OFFSET_1 0xA298 |
|---|
| 1689 | #define mmVGT_GSVS_RING_OFFSET_2 0xA299 |
|---|
| 1690 | #define mmVGT_GSVS_RING_OFFSET_3 0xA29A |
|---|
| 1691 | #define mmVGT_GSVS_RING_SIZE 0x2233 |
|---|
| 1692 | #define mmVGT_HOS_CNTL 0xA285 |
|---|
| 1693 | #define mmVGT_HOS_MAX_TESS_LEVEL 0xA286 |
|---|
| 1694 | #define mmVGT_HOS_MIN_TESS_LEVEL 0xA287 |
|---|
| 1695 | #define mmVGT_HOS_REUSE_DEPTH 0xA288 |
|---|
| 1696 | #define mmVGT_HS_OFFCHIP_PARAM 0x226C |
|---|
| 1697 | #define mmVGT_IMMED_DATA 0xA1FD |
|---|
| 1698 | #define mmVGT_INDEX_TYPE 0x2257 |
|---|
| 1699 | #define mmVGT_INDX_OFFSET 0xA102 |
|---|
| 1700 | #define mmVGT_INSTANCE_STEP_RATE_0 0xA2A8 |
|---|
| 1701 | #define mmVGT_INSTANCE_STEP_RATE_1 0xA2A9 |
|---|
| 1702 | #define mmVGT_LAST_COPY_STATE 0x2230 |
|---|
| 1703 | #define mmVGT_LS_HS_CONFIG 0xA2D6 |
|---|
| 1704 | #define mmVGT_MAX_VTX_INDX 0xA100 |
|---|
| 1705 | #define mmVGT_MC_LAT_CNTL 0x2236 |
|---|
| 1706 | #define mmVGT_MIN_VTX_INDX 0xA101 |
|---|
| 1707 | #define mmVGT_MULTI_PRIM_IB_RESET_EN 0xA2A5 |
|---|
| 1708 | #define mmVGT_MULTI_PRIM_IB_RESET_INDX 0xA103 |
|---|
| 1709 | #define mmVGT_NUM_INDICES 0x225C |
|---|
| 1710 | #define mmVGT_NUM_INSTANCES 0x225D |
|---|
| 1711 | #define mmVGT_OUT_DEALLOC_CNTL 0xA317 |
|---|
| 1712 | #define mmVGT_OUTPUT_PATH_CNTL 0xA284 |
|---|
| 1713 | #define mmVGT_PERFCOUNTER0_HI 0x224D |
|---|
| 1714 | #define mmVGT_PERFCOUNTER0_LO 0x224C |
|---|
| 1715 | #define mmVGT_PERFCOUNTER0_SELECT 0x2248 |
|---|
| 1716 | #define mmVGT_PERFCOUNTER1_HI 0x224F |
|---|
| 1717 | #define mmVGT_PERFCOUNTER1_LO 0x224E |
|---|
| 1718 | #define mmVGT_PERFCOUNTER1_SELECT 0x2249 |
|---|
| 1719 | #define mmVGT_PERFCOUNTER2_HI 0x2251 |
|---|
| 1720 | #define mmVGT_PERFCOUNTER2_LO 0x2250 |
|---|
| 1721 | #define mmVGT_PERFCOUNTER2_SELECT 0x224A |
|---|
| 1722 | #define mmVGT_PERFCOUNTER3_HI 0x2253 |
|---|
| 1723 | #define mmVGT_PERFCOUNTER3_LO 0x2252 |
|---|
| 1724 | #define mmVGT_PERFCOUNTER3_SELECT 0x224B |
|---|
| 1725 | #define mmVGT_PERFCOUNTER_SEID_MASK 0x2247 |
|---|
| 1726 | #define mmVGT_PRIMITIVEID_EN 0xA2A1 |
|---|
| 1727 | #define mmVGT_PRIMITIVEID_RESET 0xA2A3 |
|---|
| 1728 | #define mmVGT_PRIMITIVE_TYPE 0x2256 |
|---|
| 1729 | #define mmVGT_REUSE_OFF 0xA2AD |
|---|
| 1730 | #define mmVGT_SHADER_STAGES_EN 0xA2D5 |
|---|
| 1731 | #define mmVGT_STRMOUT_BUFFER_CONFIG 0xA2E6 |
|---|
| 1732 | #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_0 0x2258 |
|---|
| 1733 | #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_1 0x2259 |
|---|
| 1734 | #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_2 0x225A |
|---|
| 1735 | #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_3 0x225B |
|---|
| 1736 | #define mmVGT_STRMOUT_BUFFER_OFFSET_0 0xA2B7 |
|---|
| 1737 | #define mmVGT_STRMOUT_BUFFER_OFFSET_1 0xA2BB |
|---|
| 1738 | #define mmVGT_STRMOUT_BUFFER_OFFSET_2 0xA2BF |
|---|
| 1739 | #define mmVGT_STRMOUT_BUFFER_OFFSET_3 0xA2C3 |
|---|
| 1740 | #define mmVGT_STRMOUT_BUFFER_SIZE_0 0xA2B4 |
|---|
| 1741 | #define mmVGT_STRMOUT_BUFFER_SIZE_1 0xA2B8 |
|---|
| 1742 | #define mmVGT_STRMOUT_BUFFER_SIZE_2 0xA2BC |
|---|
| 1743 | #define mmVGT_STRMOUT_BUFFER_SIZE_3 0xA2C0 |
|---|
| 1744 | #define mmVGT_STRMOUT_CONFIG 0xA2E5 |
|---|
| 1745 | #define mmVGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE 0xA2CB |
|---|
| 1746 | #define mmVGT_STRMOUT_DRAW_OPAQUE_OFFSET 0xA2CA |
|---|
| 1747 | #define mmVGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE 0xA2CC |
|---|
| 1748 | #define mmVGT_STRMOUT_VTX_STRIDE_0 0xA2B5 |
|---|
| 1749 | #define mmVGT_STRMOUT_VTX_STRIDE_1 0xA2B9 |
|---|
| 1750 | #define mmVGT_STRMOUT_VTX_STRIDE_2 0xA2BD |
|---|
| 1751 | #define mmVGT_STRMOUT_VTX_STRIDE_3 0xA2C1 |
|---|
| 1752 | #define mmVGT_SYS_CONFIG 0x2263 |
|---|
| 1753 | #define mmVGT_TF_MEMORY_BASE 0x226E |
|---|
| 1754 | #define mmVGT_TF_PARAM 0xA2DB |
|---|
| 1755 | #define mmVGT_TF_RING_SIZE 0x2262 |
|---|
| 1756 | #define mmVGT_VERTEX_REUSE_BLOCK_CNTL 0xA316 |
|---|
| 1757 | #define mmVGT_VTX_CNT_EN 0xA2AE |
|---|
| 1758 | #define mmVGT_VTX_VECT_EJECT_REG 0x222C |
|---|
| 1759 | |
|---|
| 1760 | /* manually added from old sid.h */ |
|---|
| 1761 | #define mmCB_PERFCOUNTER0_SELECT0 0x2688 |
|---|
| 1762 | #define mmCB_PERFCOUNTER1_SELECT0 0x268A |
|---|
| 1763 | #define mmCB_PERFCOUNTER1_SELECT1 0x268B |
|---|
| 1764 | #define mmCB_PERFCOUNTER2_SELECT0 0x268C |
|---|
| 1765 | #define mmCB_PERFCOUNTER2_SELECT1 0x268D |
|---|
| 1766 | #define mmCB_PERFCOUNTER3_SELECT0 0x268E |
|---|
| 1767 | #define mmCB_PERFCOUNTER3_SELECT1 0x268F |
|---|
| 1768 | #define mmCP_COHER_CNTL2 0x217A |
|---|
| 1769 | #define mmCP_DEBUG 0x307F |
|---|
| 1770 | #define mmRLC_SERDES_MASTER_BUSY_0 0x3119 |
|---|
| 1771 | #define mmRLC_SERDES_MASTER_BUSY_1 0x311A |
|---|
| 1772 | #define mmRLC_RL_BASE 0x30C1 |
|---|
| 1773 | #define mmRLC_RL_SIZE 0x30C2 |
|---|
| 1774 | #define mmRLC_UCODE_ADDR 0x30CB |
|---|
| 1775 | #define mmRLC_UCODE_DATA 0x30CC |
|---|
| 1776 | #define mmRLC_GCPM_GENERAL_3 0x311E |
|---|
| 1777 | #define mmRLC_SERDES_WR_MASTER_MASK_0 0x3115 |
|---|
| 1778 | #define mmRLC_SERDES_WR_MASTER_MASK_1 0x3116 |
|---|
| 1779 | #define mmRLC_TTOP_D 0x3105 |
|---|
| 1780 | #define mmRLC_CLEAR_STATE_RESTORE_BASE 0x30C8 |
|---|
| 1781 | #define mmRLC_PG_AO_CU_MASK 0x310B |
|---|
| 1782 | #define mmSPI_STATIC_THREAD_MGMT_1 0x2438 |
|---|
| 1783 | #define mmSPI_STATIC_THREAD_MGMT_2 0x2439 |
|---|
| 1784 | #define mmSPI_STATIC_THREAD_MGMT_3 0x243A |
|---|
| 1785 | |
|---|
| 1786 | #endif |
|---|
| 1787 | |
|---|
