1/*
2 * Copyright 2012-15 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26/**
27 * DOC: overview
28 *
29 * Multiple Pipe/Plane Combiner (MPC) is a component in the hardware pipeline
30 * that performs blending of multiple planes, using global and per-pixel alpha.
31 * It also performs post-blending color correction operations according to the
32 * hardware capabilities, such as color transformation matrix and gamma 1D and
33 * 3D LUT.
34 *
35 * MPC receives output from all DPP pipes and combines them to multiple outputs
36 * supporting "M MPC inputs -> N MPC outputs" flexible composition
37 * architecture. It features:
38 *
39 * - Programmable blending structure to allow software controlled blending and
40 * cascading;
41 * - Programmable window location of each DPP in active region of display;
42 * - Combining multiple DPP pipes in one active region when a single DPP pipe
43 * cannot process very large surface;
44 * - Combining multiple DPP from different SLS with blending;
45 * - Stereo formats from single DPP in top-bottom or side-by-side modes;
46 * - Stereo formats from 2 DPPs;
47 * - Alpha blending of multiple layers from different DPP pipes;
48 * - Programmable background color;
49 */
50
51#ifndef __DC_MPCC_H__
52#define __DC_MPCC_H__
53
54#include "dc_hw_types.h"
55#include "hw_shared.h"
56#include "transform.h"
57
58#define MAX_MPCC 6
59#define MAX_OPP 6
60
61#define MAX_DWB 2
62
63enum mpc_output_csc_mode {
64 MPC_OUTPUT_CSC_DISABLE = 0,
65 MPC_OUTPUT_CSC_COEF_A,
66 MPC_OUTPUT_CSC_COEF_B
67};
68
69
70enum mpcc_blend_mode {
71 MPCC_BLEND_MODE_BYPASS,
72 MPCC_BLEND_MODE_TOP_LAYER_PASSTHROUGH,
73 MPCC_BLEND_MODE_TOP_LAYER_ONLY,
74 MPCC_BLEND_MODE_TOP_BOT_BLENDING
75};
76
77/**
78 * enum mpcc_alpha_blend_mode - define the alpha blend mode regarding pixel
79 * alpha and plane alpha values
80 */
81enum mpcc_alpha_blend_mode {
82 /**
83 * @MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA: per pixel alpha using DPP
84 * alpha value
85 */
86 MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA,
87 /**
88 * @MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN: per
89 * pixel alpha using DPP alpha value multiplied by a global gain (plane
90 * alpha)
91 */
92 MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN,
93 /**
94 * @MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA: global alpha value, ignores
95 * pixel alpha and consider only plane alpha
96 */
97 MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA
98};
99
100enum mpcc_movable_cm_location {
101 MPCC_MOVABLE_CM_LOCATION_BEFORE,
102 MPCC_MOVABLE_CM_LOCATION_AFTER,
103};
104
105enum MCM_LUT_XABLE {
106 MCM_LUT_DISABLE,
107 MCM_LUT_DISABLED = MCM_LUT_DISABLE,
108 MCM_LUT_ENABLE,
109 MCM_LUT_ENABLED = MCM_LUT_ENABLE,
110};
111
112enum MCM_LUT_ID {
113 MCM_LUT_3DLUT,
114 MCM_LUT_1DLUT,
115 MCM_LUT_SHAPER
116};
117
118struct mpc_fl_3dlut_config {
119 bool enabled;
120 uint16_t width;
121 bool select_lut_bank_a;
122 uint16_t bit_depth;
123 int hubp_index;
124 uint16_t bias;
125 uint16_t scale;
126};
127
128union mcm_lut_params {
129 const struct pwl_params *pwl;
130 const struct tetrahedral_params *lut3d;
131};
132
133/**
134 * struct mpcc_blnd_cfg - MPCC blending configuration
135 */
136struct mpcc_blnd_cfg {
137 /**
138 * @black_color: background color.
139 */
140 struct tg_color black_color;
141
142 /**
143 * @alpha_mode: alpha blend mode (MPCC_ALPHA_BLND_MODE).
144 */
145 enum mpcc_alpha_blend_mode alpha_mode;
146
147 /**
148 * @pre_multiplied_alpha:
149 * Whether pixel color values were pre-multiplied by the alpha channel
150 * (MPCC_ALPHA_MULTIPLIED_MODE).
151 */
152 bool pre_multiplied_alpha;
153
154 /**
155 * @global_gain: Used when blend mode considers both pixel alpha and plane.
156 */
157 int global_gain;
158
159 /**
160 * @global_alpha: Plane alpha value.
161 */
162 int global_alpha;
163
164 /**
165 * @overlap_only: Whether overlapping of different planes is allowed.
166 */
167 bool overlap_only;
168
169 /* MPCC top/bottom gain settings */
170
171 /**
172 * @bottom_gain_mode: Blend mode for bottom gain setting.
173 */
174 int bottom_gain_mode;
175
176 /**
177 * @background_color_bpc: Background color for bpc.
178 */
179 int background_color_bpc;
180
181 /**
182 * @top_gain: Top gain setting.
183 */
184 int top_gain;
185
186 /**
187 * @bottom_inside_gain: Blend mode for bottom inside.
188 */
189 int bottom_inside_gain;
190
191 /**
192 * @bottom_outside_gain: Blend mode for bottom outside.
193 */
194 int bottom_outside_gain;
195};
196
197struct mpc_grph_gamut_adjustment {
198 struct fixed31_32 temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE];
199 enum graphics_gamut_adjust_type gamut_adjust_type;
200 enum mpcc_gamut_remap_id mpcc_gamut_remap_block_id;
201};
202
203struct mpc_rmcm_regs {
204 uint32_t rmcm_3dlut_mem_pwr_state;
205 uint32_t rmcm_3dlut_mem_pwr_force;
206 uint32_t rmcm_3dlut_mem_pwr_dis;
207 uint32_t rmcm_3dlut_mem_pwr_mode;
208 uint32_t rmcm_3dlut_size;
209 uint32_t rmcm_3dlut_mode;
210 uint32_t rmcm_3dlut_mode_cur;
211 uint32_t rmcm_3dlut_read_sel;
212 uint32_t rmcm_3dlut_30bit_en;
213 uint32_t rmcm_3dlut_wr_en_mask;
214 uint32_t rmcm_3dlut_ram_sel;
215 uint32_t rmcm_3dlut_out_norm_factor;
216 uint32_t rmcm_3dlut_fl_sel;
217 uint32_t rmcm_3dlut_out_offset_r;
218 uint32_t rmcm_3dlut_out_scale_r;
219 uint32_t rmcm_3dlut_fl_done;
220 uint32_t rmcm_3dlut_fl_soft_underflow;
221 uint32_t rmcm_3dlut_fl_hard_underflow;
222 uint32_t rmcm_cntl;
223 uint32_t rmcm_shaper_mem_pwr_state;
224 uint32_t rmcm_shaper_mem_pwr_force;
225 uint32_t rmcm_shaper_mem_pwr_dis;
226 uint32_t rmcm_shaper_mem_pwr_mode;
227 uint32_t rmcm_shaper_lut_mode;
228 uint32_t rmcm_shaper_mode_cur;
229 uint32_t rmcm_shaper_lut_write_en_mask;
230 uint32_t rmcm_shaper_lut_write_sel;
231 uint32_t rmcm_shaper_offset_b;
232 uint32_t rmcm_shaper_scale_b;
233 uint32_t rmcm_shaper_rama_exp_region_start_b;
234 uint32_t rmcm_shaper_rama_exp_region_start_seg_b;
235 uint32_t rmcm_shaper_rama_exp_region_end_b;
236 uint32_t rmcm_shaper_rama_exp_region_end_base_b;
237};
238
239struct mpcc_sm_cfg {
240 bool enable;
241 /* 0-single plane,2-row subsampling,4-column subsampling,6-checkboard subsampling */
242 int sm_mode;
243 /* 0- disable frame alternate, 1- enable frame alternate */
244 bool frame_alt;
245 /* 0- disable field alternate, 1- enable field alternate */
246 bool field_alt;
247 /* 0-no force,2-force frame polarity from top,3-force frame polarity from bottom */
248 int force_next_frame_porlarity;
249 /* 0-no force,2-force field polarity from top,3-force field polarity from bottom */
250 int force_next_field_polarity;
251};
252
253struct mpc_denorm_clamp {
254 int clamp_max_r_cr;
255 int clamp_min_r_cr;
256 int clamp_max_g_y;
257 int clamp_min_g_y;
258 int clamp_max_b_cb;
259 int clamp_min_b_cb;
260};
261
262struct mpc_dwb_flow_control {
263 int flow_ctrl_mode;
264 int flow_ctrl_cnt0;
265 int flow_ctrl_cnt1;
266};
267
268/**
269 * struct mpcc - MPCC connection and blending configuration for a single MPCC instance.
270 *
271 * This struct is used as a node in an MPC tree.
272 */
273struct mpcc {
274 /**
275 * @mpcc_id: MPCC physical instance.
276 */
277 int mpcc_id;
278
279 /**
280 * @dpp_id: DPP input to this MPCC
281 */
282 int dpp_id;
283
284 /**
285 * @mpcc_bot: Pointer to bottom layer MPCC. NULL when not connected.
286 */
287 struct mpcc *mpcc_bot;
288
289 /**
290 * @blnd_cfg: The blending configuration for this MPCC.
291 */
292 struct mpcc_blnd_cfg blnd_cfg;
293
294 /**
295 * @sm_cfg: stereo mix setting for this MPCC
296 */
297 struct mpcc_sm_cfg sm_cfg;
298
299 /**
300 * @shared_bottom:
301 *
302 * If MPCC output to both OPP and DWB endpoints, true. Otherwise, false.
303 */
304 bool shared_bottom;
305};
306
307/**
308 * struct mpc_tree - MPC tree represents all MPCC connections for a pipe.
309 *
310 *
311 */
312struct mpc_tree {
313 /**
314 * @opp_id: The OPP instance that owns this MPC tree.
315 */
316 int opp_id;
317
318 /**
319 * @opp_list: the top MPCC layer of the MPC tree that outputs to OPP endpoint
320 */
321 struct mpcc *opp_list;
322};
323
324struct mpc {
325 const struct mpc_funcs *funcs;
326 struct dc_context *ctx;
327
328 struct mpcc mpcc_array[MAX_MPCC];
329 struct pwl_params blender_params;
330 bool cm_bypass_mode;
331};
332
333struct mpcc_state {
334 uint32_t opp_id;
335 uint32_t dpp_id;
336 uint32_t bot_mpcc_id;
337 uint32_t mode;
338 uint32_t alpha_mode;
339 uint32_t pre_multiplied_alpha;
340 uint32_t overlap_only;
341 uint32_t idle;
342 uint32_t busy;
343 uint32_t shaper_lut_mode;
344 uint32_t lut3d_mode;
345 uint32_t lut3d_bit_depth;
346 uint32_t lut3d_size;
347 uint32_t rgam_mode;
348 uint32_t rgam_lut;
349 struct mpc_grph_gamut_adjustment gamut_remap;
350 struct mpc_rmcm_regs rmcm_regs;
351};
352
353struct dcn_mpc_reg_state {
354 uint32_t mpcc_bot_sel;
355 uint32_t mpcc_control;
356 uint32_t mpcc_status;
357 uint32_t mpcc_top_sel;
358 uint32_t mpcc_opp_id;
359 uint32_t mpcc_ogam_control;
360};
361
362/**
363 * struct mpc_funcs - funcs
364 */
365struct mpc_funcs {
366 /**
367 * @read_mpcc_state:
368 *
369 * Read register content from given MPCC physical instance.
370 *
371 * Parameters:
372 *
373 * - [in/out] mpc - MPC context
374 * - [in] mpcc_instance - MPC context instance
375 * - [in] mpcc_state - MPC context state
376 *
377 * Return:
378 *
379 * void
380 */
381 void (*read_mpcc_state)(
382 struct mpc *mpc,
383 int mpcc_inst,
384 struct mpcc_state *s);
385 /**
386 * @mpc_read_reg_state:
387 *
388 * Read MPC register state for debugging underflow purposes.
389 *
390 * Parameters:
391 *
392 * - [in] mpc - MPC context
393 * - [out] reg_state - MPC register state structure
394 *
395 * Return:
396 *
397 * void
398 */
399 void (*mpc_read_reg_state)(
400 struct mpc *mpc,
401 int mpcc_inst,
402 struct dcn_mpc_reg_state *mpc_reg_state);
403
404 /**
405 * @insert_plane:
406 *
407 * Insert DPP into MPC tree based on specified blending position.
408 * Only used for planes that are part of blending chain for OPP output
409 *
410 * Parameters:
411 *
412 * - [in/out] mpc - MPC context.
413 * - [in/out] tree - MPC tree structure that plane will be added to.
414 * - [in] blnd_cfg - MPCC blending configuration for the new blending layer.
415 * - [in] sm_cfg - MPCC stereo mix configuration for the new blending layer.
416 * stereo mix must disable for the very bottom layer of the tree config.
417 * - [in] insert_above_mpcc - Insert new plane above this MPCC.
418 * If NULL, insert as bottom plane.
419 * - [in] dpp_id - DPP instance for the plane to be added.
420 * - [in] mpcc_id - The MPCC physical instance to use for blending.
421 *
422 * Return:
423 *
424 * struct mpcc* - MPCC that was added.
425 */
426 struct mpcc* (*insert_plane)(
427 struct mpc *mpc,
428 struct mpc_tree *tree,
429 struct mpcc_blnd_cfg *blnd_cfg,
430 struct mpcc_sm_cfg *sm_cfg,
431 struct mpcc *insert_above_mpcc,
432 int dpp_id,
433 int mpcc_id);
434
435 /**
436 * @remove_mpcc:
437 *
438 * Remove a specified MPCC from the MPC tree.
439 *
440 * Parameters:
441 *
442 * - [in/out] mpc - MPC context.
443 * - [in/out] tree - MPC tree structure that plane will be removed from.
444 * - [in/out] mpcc - MPCC to be removed from tree.
445 *
446 * Return:
447 *
448 * void
449 */
450 void (*remove_mpcc)(
451 struct mpc *mpc,
452 struct mpc_tree *tree,
453 struct mpcc *mpcc);
454
455 /**
456 * @mpc_init:
457 *
458 * Reset the MPCC HW status by disconnecting all muxes.
459 *
460 * Parameters:
461 *
462 * - [in/out] mpc - MPC context.
463 *
464 * Return:
465 *
466 * void
467 */
468 void (*mpc_init)(struct mpc *mpc);
469
470 /**
471 * @mpc_init_single_inst:
472 *
473 * Initialize given MPCC physical instance.
474 *
475 * Parameters:
476 * - [in/out] mpc - MPC context.
477 * - [in] mpcc_id - The MPCC physical instance to be initialized.
478 */
479 void (*mpc_init_single_inst)(
480 struct mpc *mpc,
481 unsigned int mpcc_id);
482
483 /**
484 * @update_blending:
485 *
486 * Update the blending configuration for a specified MPCC.
487 *
488 * Parameters:
489 *
490 * - [in/out] mpc - MPC context.
491 * - [in] blnd_cfg - MPCC blending configuration.
492 * - [in] mpcc_id - The MPCC physical instance.
493 *
494 * Return:
495 *
496 * void
497 */
498 void (*update_blending)(
499 struct mpc *mpc,
500 struct mpcc_blnd_cfg *blnd_cfg,
501 int mpcc_id);
502
503 /**
504 * @cursor_lock:
505 *
506 * Lock cursor updates for the specified OPP. OPP defines the set of
507 * MPCC that are locked together for cursor.
508 *
509 * Parameters:
510 *
511 * - [in] mpc - MPC context.
512 * - [in] opp_id - The OPP to lock cursor updates on
513 * - [in] lock - lock/unlock the OPP
514 *
515 * Return:
516 *
517 * void
518 */
519 void (*cursor_lock)(
520 struct mpc *mpc,
521 int opp_id,
522 bool lock);
523
524 /**
525 * @insert_plane_to_secondary:
526 *
527 * Add DPP into secondary MPC tree based on specified blending
528 * position. Only used for planes that are part of blending chain for
529 * DWB output
530 *
531 * Parameters:
532 *
533 * - [in/out] mpc - MPC context.
534 * - [in/out] tree - MPC tree structure that plane will be added to.
535 * - [in] blnd_cfg - MPCC blending configuration for the new blending layer.
536 * - [in] sm_cfg - MPCC stereo mix configuration for the new blending layer.
537 * stereo mix must disable for the very bottom layer of the tree config.
538 * - [in] insert_above_mpcc - Insert new plane above this MPCC. If
539 * NULL, insert as bottom plane.
540 * - [in] dpp_id - DPP instance for the plane to be added.
541 * - [in] mpcc_id - The MPCC physical instance to use for blending.
542 *
543 * Return:
544 *
545 * struct mpcc* - MPCC that was added.
546 */
547 struct mpcc* (*insert_plane_to_secondary)(
548 struct mpc *mpc,
549 struct mpc_tree *tree,
550 struct mpcc_blnd_cfg *blnd_cfg,
551 struct mpcc_sm_cfg *sm_cfg,
552 struct mpcc *insert_above_mpcc,
553 int dpp_id,
554 int mpcc_id);
555
556 /**
557 * @remove_mpcc_from_secondary:
558 *
559 * Remove a specified DPP from the 'secondary' MPC tree.
560 *
561 * Parameters:
562 *
563 * - [in/out] mpc - MPC context.
564 * - [in/out] tree - MPC tree structure that plane will be removed from.
565 * - [in] mpcc - MPCC to be removed from tree.
566 *
567 * Return:
568 *
569 * void
570 */
571 void (*remove_mpcc_from_secondary)(
572 struct mpc *mpc,
573 struct mpc_tree *tree,
574 struct mpcc *mpcc);
575
576 /**
577 * @get_mpcc_for_dpp_from_secondary:
578 *
579 * Find, if it exists, a MPCC from a given 'secondary' MPC tree that
580 * is associated with specified plane.
581 *
582 * Parameters:
583 * - [in/out] tree - MPC tree structure to search for plane.
584 * - [in] dpp_id - DPP to be searched.
585 *
586 * Return:
587 *
588 * struct mpcc* - pointer to plane or NULL if no plane found.
589 */
590 struct mpcc* (*get_mpcc_for_dpp_from_secondary)(
591 struct mpc_tree *tree,
592 int dpp_id);
593
594 /**
595 * @get_mpcc_for_dpp:
596 *
597 * Find, if it exists, a MPCC from a given MPC tree that
598 * is associated with specified plane.
599 *
600 * Parameters:
601 * - [in/out] tree - MPC tree structure to search for plane.
602 * - [in] dpp_id - DPP to be searched.
603 *
604 * Return:
605 *
606 * struct mpcc* - pointer to plane or NULL if no plane found.
607 */
608 struct mpcc* (*get_mpcc_for_dpp)(
609 struct mpc_tree *tree,
610 int dpp_id);
611
612 /**
613 * @wait_for_idle:
614 *
615 * Wait for a MPCC in MPC context to enter idle state.
616 *
617 * Parameters:
618 * - [in/out] mpc - MPC Context.
619 * - [in] id - MPCC to wait for idle state.
620 *
621 * Return:
622 *
623 * void
624 */
625 void (*wait_for_idle)(struct mpc *mpc, int id);
626
627 /**
628 * @assert_mpcc_idle_before_connect:
629 *
630 * Assert if MPCC in MPC context is in idle state.
631 *
632 * Parameters:
633 * - [in/out] mpc - MPC context.
634 * - [in] id - MPCC to assert idle state.
635 *
636 * Return:
637 *
638 * void
639 */
640 void (*assert_mpcc_idle_before_connect)(struct mpc *mpc, int mpcc_id);
641
642 /**
643 * @init_mpcc_list_from_hw:
644 *
645 * Iterate through the MPCC array from a given MPC context struct
646 * and configure each MPCC according to its registers' values.
647 *
648 * Parameters:
649 * - [in/out] mpc - MPC context to initialize MPCC array.
650 * - [in/out] tree - MPC tree structure containing MPCC contexts to initialize.
651 *
652 * Return:
653 *
654 * void
655 */
656 void (*init_mpcc_list_from_hw)(
657 struct mpc *mpc,
658 struct mpc_tree *tree);
659
660 /**
661 * @set_denorm:
662 *
663 * Set corresponding OPP DENORM_CONTROL register value to specific denorm_mode
664 * based on given color depth.
665 *
666 * Parameters:
667 * - [in/out] mpc - MPC context.
668 * - [in] opp_id - Corresponding OPP to update register.
669 * - [in] output_depth - Arbitrary color depth to set denorm_mode.
670 *
671 * Return:
672 *
673 * void
674 */
675 void (*set_denorm)(struct mpc *mpc,
676 int opp_id,
677 enum dc_color_depth output_depth);
678
679 /**
680 * @set_denorm_clamp:
681 *
682 * Set denorm clamp values on corresponding OPP DENORM CONTROL register.
683 *
684 * Parameters:
685 * - [in/out] mpc - MPC context.
686 * - [in] opp_id - Corresponding OPP to update register.
687 * - [in] denorm_clamp - Arbitrary denorm clamp to be set.
688 *
689 * Return:
690 *
691 * void
692 */
693 void (*set_denorm_clamp)(
694 struct mpc *mpc,
695 int opp_id,
696 struct mpc_denorm_clamp denorm_clamp);
697
698 /**
699 * @set_output_csc:
700 *
701 * Set the Output Color Space Conversion matrix
702 * with given values and mode.
703 *
704 * Parameters:
705 * - [in/out] mpc - MPC context.
706 * - [in] opp_id - Corresponding OPP to update register.
707 * - [in] regval - Values to set in CSC matrix.
708 * - [in] ocsc_mode - Mode to set CSC.
709 *
710 * Return:
711 *
712 * void
713 */
714 void (*set_output_csc)(struct mpc *mpc,
715 int opp_id,
716 const uint16_t *regval,
717 enum mpc_output_csc_mode ocsc_mode);
718
719 /**
720 * @set_ocsc_default:
721 *
722 * Set the Output Color Space Conversion matrix
723 * to default values according to color space.
724 *
725 * Parameters:
726 * - [in/out] mpc - MPC context.
727 * - [in] opp_id - Corresponding OPP to update register.
728 * - [in] color_space - OCSC color space.
729 * - [in] ocsc_mode - Mode to set CSC.
730 *
731 * Return:
732 *
733 * void
734 *
735 */
736 void (*set_ocsc_default)(struct mpc *mpc,
737 int opp_id,
738 enum dc_color_space color_space,
739 enum mpc_output_csc_mode ocsc_mode);
740
741 /**
742 * @set_output_gamma:
743 *
744 * Set Output Gamma with given curve parameters.
745 *
746 * Parameters:
747 * - [in/out] mpc - MPC context.
748 * - [in] mpcc_id - Corresponding MPC to update registers.
749 * - [in] params - Parameters.
750 *
751 * Return:
752 *
753 * void
754 *
755 */
756 void (*set_output_gamma)(
757 struct mpc *mpc,
758 int mpcc_id,
759 const struct pwl_params *params);
760 /**
761 * @power_on_mpc_mem_pwr:
762 *
763 * Power on/off memory LUT for given MPCC.
764 * Powering on enables LUT to be updated.
765 * Powering off allows entering low power mode.
766 *
767 * Parameters:
768 * - [in/out] mpc - MPC context.
769 * - [in] mpcc_id - MPCC to power on.
770 * - [in] power_on
771 *
772 * Return:
773 *
774 * void
775 */
776 void (*power_on_mpc_mem_pwr)(
777 struct mpc *mpc,
778 int mpcc_id,
779 bool power_on);
780 /**
781 * @set_dwb_mux:
782 *
783 * Set corresponding Display Writeback mux
784 * MPC register field to given MPCC id.
785 *
786 * Parameters:
787 * - [in/out] mpc - MPC context.
788 * - [in] dwb_id - DWB to be set.
789 * - [in] mpcc_id - MPCC id to be stored in DWB mux register.
790 *
791 * Return:
792 *
793 * void
794 */
795 void (*set_dwb_mux)(
796 struct mpc *mpc,
797 int dwb_id,
798 int mpcc_id);
799
800 /**
801 * @disable_dwb_mux:
802 *
803 * Reset corresponding Display Writeback mux
804 * MPC register field.
805 *
806 * Parameters:
807 * - [in/out] mpc - MPC context.
808 * - [in] dwb_id - DWB to be set.
809 *
810 * Return:
811 *
812 * void
813 */
814 void (*disable_dwb_mux)(
815 struct mpc *mpc,
816 int dwb_id);
817
818 /**
819 * @is_dwb_idle:
820 *
821 * Check DWB status on MPC_DWB0_MUX_STATUS register field.
822 * Return if it is null.
823 *
824 * Parameters:
825 * - [in/out] mpc - MPC context.
826 * - [in] dwb_id - DWB to be checked.
827 *
828 * Return:
829 *
830 * bool - wheter DWB is idle or not
831 */
832 bool (*is_dwb_idle)(
833 struct mpc *mpc,
834 int dwb_id);
835
836 /**
837 * @set_out_rate_control:
838 *
839 * Set display output rate control.
840 *
841 * Parameters:
842 * - [in/out] mpc - MPC context.
843 * - [in] opp_id - OPP to be set.
844 * - [in] enable
845 * - [in] rate_2x_mode
846 * - [in] flow_control
847 *
848 * Return:
849 *
850 * void
851 */
852 void (*set_out_rate_control)(
853 struct mpc *mpc,
854 int opp_id,
855 bool enable,
856 bool rate_2x_mode,
857 struct mpc_dwb_flow_control *flow_control);
858
859 /**
860 * @set_gamut_remap:
861 *
862 * Set post-blending CTM for given MPCC.
863 *
864 * Parameters:
865 * - [in] mpc - MPC context.
866 * - [in] mpcc_id - MPCC to set gamut map.
867 * - [in] adjust
868 *
869 * Return:
870 *
871 * void
872 */
873 void (*set_gamut_remap)(
874 struct mpc *mpc,
875 int mpcc_id,
876 const struct mpc_grph_gamut_adjustment *adjust);
877
878 /**
879 * @program_1dlut:
880 *
881 * Set 1 dimensional Lookup Table.
882 *
883 * Parameters:
884 * - [in/out] mpc - MPC context
885 * - [in] params - curve parameters for the LUT configuration
886 * - [in] rmu_idx
887 *
888 * bool - wheter LUT was set (set with given parameters) or not (params is NULL and LUT is disabled).
889 */
890 bool (*program_1dlut)(
891 struct mpc *mpc,
892 const struct pwl_params *params,
893 uint32_t rmu_idx);
894
895 /**
896 * @program_shaper:
897 *
898 * Set shaper.
899 *
900 * Parameters:
901 * - [in/out] mpc - MPC context
902 * - [in] params - curve parameters to be set
903 * - [in] rmu_idx
904 *
905 * Return:
906 *
907 * bool - wheter shaper was set (set with given parameters) or not (params is NULL and LUT is disabled).
908 */
909 bool (*program_shaper)(
910 struct mpc *mpc,
911 const struct pwl_params *params,
912 uint32_t rmu_idx);
913
914 /**
915 * @acquire_rmu:
916 *
917 * Set given MPCC to be multiplexed to given RMU unit.
918 *
919 * Parameters:
920 * - [in/out] mpc - MPC context
921 * - [in] mpcc_id - MPCC
922 * - [in] rmu_idx - Given RMU unit to set MPCC to be multiplexed to.
923 *
924 * Return:
925 *
926 * unit32_t - rmu_idx if operation was successful, -1 else.
927 */
928 uint32_t (*acquire_rmu)(struct mpc *mpc, int mpcc_id, int rmu_idx);
929
930 /**
931 * @program_3dlut:
932 *
933 * Set 3 dimensional Lookup Table.
934 *
935 * Parameters:
936 * - [in/out] mpc - MPC context
937 * - [in] params - tetrahedral parameters for the LUT configuration
938 * - [in] rmu_idx
939 *
940 * bool - wheter LUT was set (set with given parameters) or not (params is NULL and LUT is disabled).
941 */
942 bool (*program_3dlut)(
943 struct mpc *mpc,
944 const struct tetrahedral_params *params,
945 int rmu_idx);
946
947 /**
948 * @release_rmu:
949 *
950 * For a given MPCC, release the RMU unit it muliplexes to.
951 *
952 * Parameters:
953 * - [in/out] mpc - MPC context
954 * - [in] mpcc_id - MPCC
955 *
956 * Return:
957 *
958 * int - a valid rmu_idx representing released RMU unit or -1 if there was no RMU unit to release.
959 */
960 int (*release_rmu)(struct mpc *mpc, int mpcc_id);
961
962 /**
963 * @get_mpc_out_mux:
964 *
965 * Return MPC out mux.
966 *
967 * Parameters:
968 * - [in] mpc - MPC context.
969 * - [in] opp_id - OPP
970 *
971 * Return:
972 *
973 * unsigned int - Out Mux
974 */
975 unsigned int (*get_mpc_out_mux)(
976 struct mpc *mpc,
977 int opp_id);
978
979 /**
980 * @set_bg_color:
981 *
982 * Find corresponding bottommost MPCC and
983 * set its bg color.
984 *
985 * Parameters:
986 * - [in/out] mpc - MPC context.
987 * - [in] bg_color - background color to be set.
988 * - [in] mpcc_id
989 *
990 * Return:
991 *
992 * void
993 */
994 void (*set_bg_color)(struct mpc *mpc,
995 struct tg_color *bg_color,
996 int mpcc_id);
997
998 /**
999 * @set_mpc_mem_lp_mode:
1000 *
1001 * Set mpc_mem_lp_mode.
1002 *
1003 * Parameters:
1004 * - [in/out] mpc - MPC context.
1005 *
1006 * Return:
1007 *
1008 * void
1009 */
1010
1011 void (*set_mpc_mem_lp_mode)(struct mpc *mpc);
1012 /**
1013 * @set_movable_cm_location:
1014 *
1015 * Set Movable CM Location.
1016 *
1017 * Parameters:
1018 * - [in/out] mpc - MPC context.
1019 * - [in] location
1020 * - [in] mpcc_id
1021 *
1022 * Return:
1023 *
1024 * void
1025 */
1026
1027 void (*set_movable_cm_location)(struct mpc *mpc, enum mpcc_movable_cm_location location, int mpcc_id);
1028 /**
1029 * @update_3dlut_fast_load_select:
1030 *
1031 * Update 3D LUT fast load select.
1032 *
1033 * Parameters:
1034 * - [in/out] mpc - MPC context.
1035 * - [in] mpcc_id
1036 * - [in] hubp_idx
1037 *
1038 * Return:
1039 *
1040 * void
1041 */
1042
1043 void (*update_3dlut_fast_load_select)(struct mpc *mpc, int mpcc_id, int hubp_idx);
1044
1045 /**
1046 * @populate_lut:
1047 *
1048 * Populate LUT with given tetrahedral parameters.
1049 *
1050 * Parameters:
1051 * - [in/out] mpc - MPC context.
1052 * - [in] id
1053 * - [in] params
1054 * - [in] lut_bank_a
1055 * - [in] mpcc_id
1056 *
1057 * Return:
1058 *
1059 * void
1060 */
1061 void (*populate_lut)(struct mpc *mpc, const enum MCM_LUT_ID id, const union mcm_lut_params params,
1062 bool lut_bank_a, int mpcc_id);
1063
1064 /**
1065 * @program_lut_read_write_control:
1066 *
1067 * Program LUT RW control.
1068 *
1069 * Parameters:
1070 * - [in/out] mpc - MPC context.
1071 * - [in] id
1072 * - [in] lut_bank_a
1073 * - [in] mpcc_id
1074 *
1075 * Return:
1076 *
1077 * void
1078 */
1079 void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id, bool lut_bank_a, int mpcc_id);
1080
1081 /**
1082 * @program_lut_mode:
1083 *
1084 * Program LUT mode.
1085 *
1086 * Parameters:
1087 * - [in/out] mpc - MPC context.
1088 * - [in] id
1089 * - [in] xable
1090 * - [in] lut_bank_a
1091 * - [in] mpcc_id
1092 *
1093 * Return:
1094 *
1095 * void
1096 */
1097 void (*program_lut_mode)(struct mpc *mpc, const enum MCM_LUT_ID id, const enum MCM_LUT_XABLE xable,
1098 bool lut_bank_a, int mpcc_id);
1099
1100 /**
1101 * @mcm:
1102 *
1103 * MPC MCM new HW sequential programming functions
1104 */
1105 struct {
1106 void (*program_3dlut_size)(struct mpc *mpc, uint32_t width, int mpcc_id);
1107 void (*program_bias_scale)(struct mpc *mpc, uint16_t bias, uint16_t scale, int mpcc_id);
1108 void (*program_bit_depth)(struct mpc *mpc, uint16_t bit_depth, int mpcc_id);
1109 bool (*is_config_supported)(uint32_t width);
1110 void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id,
1111 bool lut_bank_a, bool enabled, int mpcc_id);
1112
1113 void (*populate_lut)(struct mpc *mpc, const union mcm_lut_params params,
1114 bool lut_bank_a, int mpcc_id);
1115 } mcm;
1116
1117 /**
1118 * @rmcm:
1119 *
1120 * MPC RMCM new HW sequential programming functions
1121 */
1122 struct {
1123 void (*fl_3dlut_configure)(struct mpc *mpc, struct mpc_fl_3dlut_config *cfg, int mpcc_id);
1124 void (*enable_3dlut_fl)(struct mpc *mpc, bool enable, int mpcc_id);
1125 void (*update_3dlut_fast_load_select)(struct mpc *mpc, int mpcc_id, int hubp_idx);
1126 void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id,
1127 bool lut_bank_a, bool enabled, int mpcc_id);
1128 void (*program_lut_mode)(struct mpc *mpc, const enum MCM_LUT_XABLE xable,
1129 bool lut_bank_a, int mpcc_id);
1130 void (*program_3dlut_size)(struct mpc *mpc, uint32_t width, int mpcc_id);
1131 void (*program_bias_scale)(struct mpc *mpc, uint16_t bias, uint16_t scale, int mpcc_id);
1132 void (*program_bit_depth)(struct mpc *mpc, uint16_t bit_depth, int mpcc_id);
1133 bool (*is_config_supported)(uint32_t width);
1134
1135 void (*power_on_shaper_3dlut)(struct mpc *mpc, uint32_t mpcc_id, bool power_on);
1136 void (*populate_lut)(struct mpc *mpc, const union mcm_lut_params params,
1137 bool lut_bank_a, int mpcc_id);
1138 } rmcm;
1139};
1140
1141#endif
1142

source code of linux/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h