1/*
2 * Copyright 2023 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef __AMDGPU_ACA_H__
25#define __AMDGPU_ACA_H__
26
27#include <linux/list.h>
28
29struct ras_err_data;
30struct ras_query_context;
31
32#define ACA_MAX_REGS_COUNT (16)
33
34#define ACA_REG_FIELD(x, h, l) (((x) & GENMASK_ULL(h, l)) >> l)
35#define ACA_REG__STATUS__VAL(x) ACA_REG_FIELD(x, 63, 63)
36#define ACA_REG__STATUS__OVERFLOW(x) ACA_REG_FIELD(x, 62, 62)
37#define ACA_REG__STATUS__UC(x) ACA_REG_FIELD(x, 61, 61)
38#define ACA_REG__STATUS__EN(x) ACA_REG_FIELD(x, 60, 60)
39#define ACA_REG__STATUS__MISCV(x) ACA_REG_FIELD(x, 59, 59)
40#define ACA_REG__STATUS__ADDRV(x) ACA_REG_FIELD(x, 58, 58)
41#define ACA_REG__STATUS__PCC(x) ACA_REG_FIELD(x, 57, 57)
42#define ACA_REG__STATUS__ERRCOREIDVAL(x) ACA_REG_FIELD(x, 56, 56)
43#define ACA_REG__STATUS__TCC(x) ACA_REG_FIELD(x, 55, 55)
44#define ACA_REG__STATUS__SYNDV(x) ACA_REG_FIELD(x, 53, 53)
45#define ACA_REG__STATUS__CECC(x) ACA_REG_FIELD(x, 46, 46)
46#define ACA_REG__STATUS__UECC(x) ACA_REG_FIELD(x, 45, 45)
47#define ACA_REG__STATUS__DEFERRED(x) ACA_REG_FIELD(x, 44, 44)
48#define ACA_REG__STATUS__POISON(x) ACA_REG_FIELD(x, 43, 43)
49#define ACA_REG__STATUS__SCRUB(x) ACA_REG_FIELD(x, 40, 40)
50#define ACA_REG__STATUS__ERRCOREID(x) ACA_REG_FIELD(x, 37, 32)
51#define ACA_REG__STATUS__ADDRLSB(x) ACA_REG_FIELD(x, 29, 24)
52#define ACA_REG__STATUS__ERRORCODEEXT(x) ACA_REG_FIELD(x, 21, 16)
53#define ACA_REG__STATUS__ERRORCODE(x) ACA_REG_FIELD(x, 15, 0)
54
55#define ACA_REG__IPID__MCATYPE(x) ACA_REG_FIELD(x, 63, 48)
56#define ACA_REG__IPID__INSTANCEIDHI(x) ACA_REG_FIELD(x, 47, 44)
57#define ACA_REG__IPID__HARDWAREID(x) ACA_REG_FIELD(x, 43, 32)
58#define ACA_REG__IPID__INSTANCEIDLO(x) ACA_REG_FIELD(x, 31, 0)
59
60#define ACA_REG__MISC0__VALID(x) ACA_REG_FIELD(x, 63, 63)
61#define ACA_REG__MISC0__OVRFLW(x) ACA_REG_FIELD(x, 48, 48)
62#define ACA_REG__MISC0__ERRCNT(x) ACA_REG_FIELD(x, 43, 32)
63
64#define ACA_REG__SYND__ERRORINFORMATION(x) ACA_REG_FIELD(x, 17, 0)
65
66/* NOTE: The following codes refers to the smu header file */
67#define ACA_EXTERROR_CODE_CE 0x3a
68#define ACA_EXTERROR_CODE_FAULT 0x3b
69
70#define ACA_ERROR_UE_MASK BIT_MASK(ACA_ERROR_TYPE_UE)
71#define ACA_ERROR_CE_MASK BIT_MASK(ACA_ERROR_TYPE_CE)
72#define ACA_ERROR_DEFERRED_MASK BIT_MASK(ACA_ERROR_TYPE_DEFERRED)
73
74#define mmSMNAID_AID0_MCA_SMU 0x03b30400 /* SMN AID AID0 */
75#define mmSMNAID_XCD0_MCA_SMU 0x36430400 /* SMN AID XCD0 */
76#define mmSMNAID_XCD1_MCA_SMU 0x38430400 /* SMN AID XCD1 */
77#define mmSMNXCD_XCD0_MCA_SMU 0x40430400 /* SMN XCD XCD0 */
78
79#define ACA_BANK_ERR_IS_DEFFERED(bank) \
80 (ACA_REG__STATUS__POISON((bank)->regs[ACA_REG_IDX_STATUS]) || \
81 ACA_REG__STATUS__DEFERRED((bank)->regs[ACA_REG_IDX_STATUS]))
82
83enum aca_reg_idx {
84 ACA_REG_IDX_CTL = 0,
85 ACA_REG_IDX_STATUS = 1,
86 ACA_REG_IDX_ADDR = 2,
87 ACA_REG_IDX_MISC0 = 3,
88 ACA_REG_IDX_CONFIG = 4,
89 ACA_REG_IDX_IPID = 5,
90 ACA_REG_IDX_SYND = 6,
91 ACA_REG_IDX_DESTAT = 8,
92 ACA_REG_IDX_DEADDR = 9,
93 ACA_REG_IDX_CTL_MASK = 10,
94 ACA_REG_IDX_COUNT = 16,
95};
96
97enum aca_hwip_type {
98 ACA_HWIP_TYPE_UNKNOW = -1,
99 ACA_HWIP_TYPE_PSP = 0,
100 ACA_HWIP_TYPE_UMC,
101 ACA_HWIP_TYPE_SMU,
102 ACA_HWIP_TYPE_PCS_XGMI,
103 ACA_HWIP_TYPE_COUNT,
104};
105
106enum aca_error_type {
107 ACA_ERROR_TYPE_INVALID = -1,
108 ACA_ERROR_TYPE_UE = 0,
109 ACA_ERROR_TYPE_CE,
110 ACA_ERROR_TYPE_DEFERRED,
111 ACA_ERROR_TYPE_COUNT
112};
113
114enum aca_smu_type {
115 ACA_SMU_TYPE_INVALID = -1,
116 ACA_SMU_TYPE_UE = 0,
117 ACA_SMU_TYPE_CE,
118 ACA_SMU_TYPE_COUNT,
119};
120
121struct aca_hwip {
122 int hwid;
123 int mcatype;
124};
125
126struct aca_bank {
127 enum aca_error_type aca_err_type;
128 enum aca_smu_type smu_err_type;
129 u64 regs[ACA_MAX_REGS_COUNT];
130};
131
132struct aca_bank_node {
133 struct aca_bank bank;
134 struct list_head node;
135};
136
137struct aca_banks {
138 int nr_banks;
139 struct list_head list;
140};
141
142struct aca_bank_info {
143 int die_id;
144 int socket_id;
145 int hwid;
146 int mcatype;
147};
148
149struct aca_bank_error {
150 struct list_head node;
151 struct aca_bank_info info;
152 u64 count;
153};
154
155struct aca_error {
156 struct list_head list;
157 struct mutex lock;
158 enum aca_error_type type;
159 int nr_errors;
160};
161
162struct aca_handle_manager {
163 struct list_head list;
164 int nr_handles;
165};
166
167struct aca_error_cache {
168 struct aca_error errors[ACA_ERROR_TYPE_COUNT];
169};
170
171struct aca_handle {
172 struct list_head node;
173 enum aca_hwip_type hwip;
174 struct amdgpu_device *adev;
175 struct aca_handle_manager *mgr;
176 struct aca_error_cache error_cache;
177 const struct aca_bank_ops *bank_ops;
178 struct device_attribute aca_attr;
179 char attr_name[64];
180 const char *name;
181 u32 mask;
182 void *data;
183};
184
185struct aca_bank_ops {
186 int (*aca_bank_parser)(struct aca_handle *handle, struct aca_bank *bank, enum aca_smu_type type, void *data);
187 bool (*aca_bank_is_valid)(struct aca_handle *handle, struct aca_bank *bank, enum aca_smu_type type,
188 void *data);
189};
190
191struct aca_smu_funcs {
192 int max_ue_bank_count;
193 int max_ce_bank_count;
194 int (*set_debug_mode)(struct amdgpu_device *adev, bool enable);
195 int (*get_valid_aca_count)(struct amdgpu_device *adev, enum aca_smu_type type, u32 *count);
196 int (*get_valid_aca_bank)(struct amdgpu_device *adev, enum aca_smu_type type, int idx, struct aca_bank *bank);
197 int (*parse_error_code)(struct amdgpu_device *adev, struct aca_bank *bank);
198};
199
200struct amdgpu_aca {
201 struct aca_handle_manager mgr;
202 const struct aca_smu_funcs *smu_funcs;
203 atomic_t ue_update_flag;
204 bool is_enabled;
205};
206
207struct aca_info {
208 enum aca_hwip_type hwip;
209 const struct aca_bank_ops *bank_ops;
210 u32 mask;
211};
212
213int amdgpu_aca_init(struct amdgpu_device *adev);
214void amdgpu_aca_fini(struct amdgpu_device *adev);
215int amdgpu_aca_reset(struct amdgpu_device *adev);
216void amdgpu_aca_set_smu_funcs(struct amdgpu_device *adev, const struct aca_smu_funcs *smu_funcs);
217bool amdgpu_aca_is_enabled(struct amdgpu_device *adev);
218
219int aca_bank_info_decode(struct aca_bank *bank, struct aca_bank_info *info);
220int aca_bank_check_error_codes(struct amdgpu_device *adev, struct aca_bank *bank, int *err_codes, int size);
221
222int amdgpu_aca_add_handle(struct amdgpu_device *adev, struct aca_handle *handle,
223 const char *name, const struct aca_info *aca_info, void *data);
224void amdgpu_aca_remove_handle(struct aca_handle *handle);
225int amdgpu_aca_get_error_data(struct amdgpu_device *adev, struct aca_handle *handle,
226 enum aca_error_type type, struct ras_err_data *err_data,
227 struct ras_query_context *qctx);
228int amdgpu_aca_smu_set_debug_mode(struct amdgpu_device *adev, bool en);
229void amdgpu_aca_smu_debugfs_init(struct amdgpu_device *adev, struct dentry *root);
230int aca_error_cache_log_bank_error(struct aca_handle *handle, struct aca_bank_info *info,
231 enum aca_error_type type, u64 count);
232#endif
233

source code of linux/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h