1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Analog Devices ADP5585 GPIO driver
4 *
5 * Copyright 2022 NXP
6 * Copyright 2024 Ideas on Board Oy
7 * Copyright 2025 Analog Devices, Inc.
8 */
9
10#include <linux/bitmap.h>
11#include <linux/bitops.h>
12#include <linux/container_of.h>
13#include <linux/device.h>
14#include <linux/gpio/driver.h>
15#include <linux/mfd/adp5585.h>
16#include <linux/module.h>
17#include <linux/mutex.h>
18#include <linux/notifier.h>
19#include <linux/platform_device.h>
20#include <linux/regmap.h>
21#include <linux/types.h>
22
23/*
24 * Bank 0 covers pins "GPIO 1/R0" to "GPIO 6/R5", numbered 0 to 5 by the
25 * driver, and bank 1 covers pins "GPIO 7/C0" to "GPIO 11/C4", numbered 6 to
26 * 10. Some variants of the ADP5585 don't support "GPIO 6/R5". As the driver
27 * uses identical GPIO numbering for all variants to avoid confusion, GPIO 5 is
28 * marked as reserved in the device tree for variants that don't support it.
29 */
30#define ADP5585_BANK(n) ((n) >= 6 ? 1 : 0)
31#define ADP5585_BIT(n) ((n) >= 6 ? BIT((n) - 6) : BIT(n))
32
33/*
34 * Bank 0 covers pins "GPIO 1/R0" to "GPIO 8/R7", numbered 0 to 7 by the
35 * driver, bank 1 covers pins "GPIO 9/C0" to "GPIO 16/C7", numbered 8 to
36 * 15 and bank 3 covers pins "GPIO 17/C8" to "GPIO 19/C10", numbered 16 to 18.
37 */
38#define ADP5589_BANK(n) ((n) >> 3)
39#define ADP5589_BIT(n) BIT((n) & 0x7)
40
41struct adp5585_gpio_chip {
42 int (*bank)(unsigned int off);
43 int (*bit)(unsigned int off);
44 unsigned int debounce_dis_a;
45 unsigned int rpull_cfg_a;
46 unsigned int gpo_data_a;
47 unsigned int gpo_out_a;
48 unsigned int gpio_dir_a;
49 unsigned int gpi_stat_a;
50 unsigned int gpi_int_lvl_a;
51 unsigned int gpi_ev_a;
52 unsigned int gpi_ev_min;
53 unsigned int gpi_ev_max;
54 bool has_bias_hole;
55};
56
57struct adp5585_gpio_dev {
58 struct gpio_chip gpio_chip;
59 struct notifier_block nb;
60 const struct adp5585_gpio_chip *info;
61 struct regmap *regmap;
62 unsigned long irq_mask;
63 unsigned long irq_en;
64 unsigned long irq_active_high;
65 /* used for irqchip bus locking */
66 struct mutex bus_lock;
67};
68
69static int adp5585_gpio_bank(unsigned int off)
70{
71 return ADP5585_BANK(off);
72}
73
74static int adp5585_gpio_bit(unsigned int off)
75{
76 return ADP5585_BIT(off);
77}
78
79static int adp5589_gpio_bank(unsigned int off)
80{
81 return ADP5589_BANK(off);
82}
83
84static int adp5589_gpio_bit(unsigned int off)
85{
86 return ADP5589_BIT(off);
87}
88
89static int adp5585_gpio_get_direction(struct gpio_chip *chip, unsigned int off)
90{
91 struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(gc: chip);
92 const struct adp5585_gpio_chip *info = adp5585_gpio->info;
93 unsigned int val;
94
95 regmap_read(map: adp5585_gpio->regmap, reg: info->gpio_dir_a + info->bank(off), val: &val);
96
97 return val & info->bit(off) ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;
98}
99
100static int adp5585_gpio_direction_input(struct gpio_chip *chip, unsigned int off)
101{
102 struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(gc: chip);
103 const struct adp5585_gpio_chip *info = adp5585_gpio->info;
104
105 return regmap_clear_bits(map: adp5585_gpio->regmap, reg: info->gpio_dir_a + info->bank(off),
106 bits: info->bit(off));
107}
108
109static int adp5585_gpio_direction_output(struct gpio_chip *chip, unsigned int off, int val)
110{
111 struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(gc: chip);
112 const struct adp5585_gpio_chip *info = adp5585_gpio->info;
113 unsigned int bank = info->bank(off);
114 unsigned int bit = info->bit(off);
115 int ret;
116
117 ret = regmap_update_bits(map: adp5585_gpio->regmap, reg: info->gpo_data_a + bank,
118 mask: bit, val: val ? bit : 0);
119 if (ret)
120 return ret;
121
122 return regmap_set_bits(map: adp5585_gpio->regmap, reg: info->gpio_dir_a + bank,
123 bits: bit);
124}
125
126static int adp5585_gpio_get_value(struct gpio_chip *chip, unsigned int off)
127{
128 struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(gc: chip);
129 const struct adp5585_gpio_chip *info = adp5585_gpio->info;
130 unsigned int bank = info->bank(off);
131 unsigned int bit = info->bit(off);
132 unsigned int reg;
133 unsigned int val;
134
135 /*
136 * The input status register doesn't reflect the pin state when the
137 * GPIO is configured as an output. Check the direction, and read the
138 * input status from GPI_STATUS or output value from GPO_DATA_OUT
139 * accordingly.
140 *
141 * We don't need any locking, as concurrent access to the same GPIO
142 * isn't allowed by the GPIO API, so there's no risk of the
143 * .direction_input(), .direction_output() or .set() operations racing
144 * with this.
145 */
146 regmap_read(map: adp5585_gpio->regmap, reg: info->gpio_dir_a + bank, val: &val);
147 reg = val & bit ? info->gpo_data_a : info->gpi_stat_a;
148 regmap_read(map: adp5585_gpio->regmap, reg: reg + bank, val: &val);
149
150 return !!(val & bit);
151}
152
153static int adp5585_gpio_set_value(struct gpio_chip *chip, unsigned int off,
154 int val)
155{
156 struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(gc: chip);
157 const struct adp5585_gpio_chip *info = adp5585_gpio->info;
158 unsigned int bit = adp5585_gpio->info->bit(off);
159
160 return regmap_update_bits(map: adp5585_gpio->regmap, reg: info->gpo_data_a + info->bank(off),
161 mask: bit, val: val ? bit : 0);
162}
163
164static int adp5585_gpio_set_bias(struct adp5585_gpio_dev *adp5585_gpio,
165 unsigned int off, unsigned int bias)
166{
167 const struct adp5585_gpio_chip *info = adp5585_gpio->info;
168 unsigned int bit, reg, mask, val;
169
170 /*
171 * The bias configuration fields are 2 bits wide and laid down in
172 * consecutive registers ADP5585_RPULL_CONFIG_*, with a hole of 4 bits
173 * after R5.
174 */
175 bit = off * 2;
176 if (info->has_bias_hole)
177 bit += (off > 5 ? 4 : 0);
178 reg = info->rpull_cfg_a + bit / 8;
179 mask = ADP5585_Rx_PULL_CFG_MASK << (bit % 8);
180 val = bias << (bit % 8);
181
182 return regmap_update_bits(map: adp5585_gpio->regmap, reg, mask, val);
183}
184
185static int adp5585_gpio_set_drive(struct adp5585_gpio_dev *adp5585_gpio,
186 unsigned int off, enum pin_config_param drive)
187{
188 const struct adp5585_gpio_chip *info = adp5585_gpio->info;
189 unsigned int bit = adp5585_gpio->info->bit(off);
190
191 return regmap_update_bits(map: adp5585_gpio->regmap,
192 reg: info->gpo_out_a + info->bank(off), mask: bit,
193 val: drive == PIN_CONFIG_DRIVE_OPEN_DRAIN ? bit : 0);
194}
195
196static int adp5585_gpio_set_debounce(struct adp5585_gpio_dev *adp5585_gpio,
197 unsigned int off, unsigned int debounce)
198{
199 const struct adp5585_gpio_chip *info = adp5585_gpio->info;
200 unsigned int bit = adp5585_gpio->info->bit(off);
201
202 return regmap_update_bits(map: adp5585_gpio->regmap,
203 reg: info->debounce_dis_a + info->bank(off), mask: bit,
204 val: debounce ? 0 : bit);
205}
206
207static int adp5585_gpio_set_config(struct gpio_chip *chip, unsigned int off,
208 unsigned long config)
209{
210 struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(gc: chip);
211 enum pin_config_param param = pinconf_to_config_param(config);
212 u32 arg = pinconf_to_config_argument(config);
213
214 switch (param) {
215 case PIN_CONFIG_BIAS_DISABLE:
216 return adp5585_gpio_set_bias(adp5585_gpio, off,
217 ADP5585_Rx_PULL_CFG_DISABLE);
218
219 case PIN_CONFIG_BIAS_PULL_DOWN:
220 return adp5585_gpio_set_bias(adp5585_gpio, off, bias: arg ?
221 ADP5585_Rx_PULL_CFG_PD_300K :
222 ADP5585_Rx_PULL_CFG_DISABLE);
223
224 case PIN_CONFIG_BIAS_PULL_UP:
225 return adp5585_gpio_set_bias(adp5585_gpio, off, bias: arg ?
226 ADP5585_Rx_PULL_CFG_PU_300K :
227 ADP5585_Rx_PULL_CFG_DISABLE);
228
229 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
230 case PIN_CONFIG_DRIVE_PUSH_PULL:
231 return adp5585_gpio_set_drive(adp5585_gpio, off, drive: param);
232
233 case PIN_CONFIG_INPUT_DEBOUNCE:
234 return adp5585_gpio_set_debounce(adp5585_gpio, off, debounce: arg);
235
236 default:
237 return -ENOTSUPP;
238 };
239}
240
241static int adp5585_gpio_request(struct gpio_chip *chip, unsigned int off)
242{
243 struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(gc: chip);
244 const struct adp5585_gpio_chip *info = adp5585_gpio->info;
245 struct device *dev = chip->parent;
246 struct adp5585_dev *adp5585 = dev_get_drvdata(dev: dev->parent);
247 const struct adp5585_regs *regs = adp5585->regs;
248 int ret;
249
250 ret = test_and_set_bit(nr: off, addr: adp5585->pin_usage);
251 if (ret)
252 return -EBUSY;
253
254 /* make sure it's configured for GPIO */
255 return regmap_clear_bits(map: adp5585_gpio->regmap,
256 reg: regs->pin_cfg_a + info->bank(off),
257 bits: info->bit(off));
258}
259
260static void adp5585_gpio_free(struct gpio_chip *chip, unsigned int off)
261{
262 struct device *dev = chip->parent;
263 struct adp5585_dev *adp5585 = dev_get_drvdata(dev: dev->parent);
264
265 clear_bit(nr: off, addr: adp5585->pin_usage);
266}
267
268static int adp5585_gpio_key_event(struct notifier_block *nb, unsigned long key,
269 void *data)
270{
271 struct adp5585_gpio_dev *adp5585_gpio = container_of(nb, struct adp5585_gpio_dev, nb);
272 struct device *dev = adp5585_gpio->gpio_chip.parent;
273 unsigned long key_press = (unsigned long)data;
274 unsigned int irq, irq_type;
275 struct irq_data *irqd;
276 bool active_high;
277 unsigned int off;
278
279 /* make sure the event is for me */
280 if (key < adp5585_gpio->info->gpi_ev_min || key > adp5585_gpio->info->gpi_ev_max)
281 return NOTIFY_DONE;
282
283 off = key - adp5585_gpio->info->gpi_ev_min;
284 active_high = test_bit(off, &adp5585_gpio->irq_active_high);
285
286 irq = irq_find_mapping(domain: adp5585_gpio->gpio_chip.irq.domain, hwirq: off);
287 if (!irq)
288 return NOTIFY_BAD;
289
290 irqd = irq_get_irq_data(irq);
291 if (!irqd) {
292 dev_err(dev, "Could not get irq(%u) data\n", irq);
293 return NOTIFY_BAD;
294 }
295
296 dev_dbg_ratelimited(dev, "gpio-keys event(%u) press=%lu, a_high=%u\n",
297 off, key_press, active_high);
298
299 if (!active_high)
300 key_press = !key_press;
301
302 irq_type = irqd_get_trigger_type(d: irqd);
303
304 if ((irq_type & IRQ_TYPE_EDGE_RISING && key_press) ||
305 (irq_type & IRQ_TYPE_EDGE_FALLING && !key_press))
306 handle_nested_irq(irq);
307
308 return NOTIFY_STOP;
309}
310
311static void adp5585_irq_bus_lock(struct irq_data *d)
312{
313 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
314 struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(gc);
315
316 mutex_lock(&adp5585_gpio->bus_lock);
317}
318
319static void adp5585_irq_bus_sync_unlock(struct irq_data *d)
320{
321 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
322 struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(gc: chip);
323 const struct adp5585_gpio_chip *info = adp5585_gpio->info;
324 irq_hw_number_t hwirq = irqd_to_hwirq(d);
325 bool active_high = test_bit(hwirq, &adp5585_gpio->irq_active_high);
326 bool enabled = test_bit(hwirq, &adp5585_gpio->irq_en);
327 bool masked = test_bit(hwirq, &adp5585_gpio->irq_mask);
328 unsigned int bank = adp5585_gpio->info->bank(hwirq);
329 unsigned int bit = adp5585_gpio->info->bit(hwirq);
330
331 if (masked && !enabled)
332 goto out_unlock;
333 if (!masked && enabled)
334 goto out_unlock;
335
336 regmap_update_bits(map: adp5585_gpio->regmap, reg: info->gpi_int_lvl_a + bank, mask: bit,
337 val: active_high ? bit : 0);
338 regmap_update_bits(map: adp5585_gpio->regmap, reg: info->gpi_ev_a + bank, mask: bit,
339 val: masked ? 0 : bit);
340 assign_bit(hwirq, &adp5585_gpio->irq_en, !masked);
341
342out_unlock:
343 mutex_unlock(lock: &adp5585_gpio->bus_lock);
344}
345
346static void adp5585_irq_mask(struct irq_data *d)
347{
348 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
349 struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(gc);
350 irq_hw_number_t hwirq = irqd_to_hwirq(d);
351
352 __set_bit(hwirq, &adp5585_gpio->irq_mask);
353 gpiochip_disable_irq(gc, offset: hwirq);
354}
355
356static void adp5585_irq_unmask(struct irq_data *d)
357{
358 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
359 struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(gc);
360 irq_hw_number_t hwirq = irqd_to_hwirq(d);
361
362 gpiochip_enable_irq(gc, offset: hwirq);
363 __clear_bit(hwirq, &adp5585_gpio->irq_mask);
364}
365
366static int adp5585_irq_set_type(struct irq_data *d, unsigned int type)
367{
368 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
369 struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(gc);
370 irq_hw_number_t hwirq = irqd_to_hwirq(d);
371
372 if (!(type & IRQ_TYPE_EDGE_BOTH))
373 return -EINVAL;
374
375 assign_bit(hwirq, &adp5585_gpio->irq_active_high,
376 type == IRQ_TYPE_EDGE_RISING);
377
378 irq_set_handler_locked(data: d, handler: handle_edge_irq);
379 return 0;
380}
381
382static const struct irq_chip adp5585_irq_chip = {
383 .name = "adp5585",
384 .irq_mask = adp5585_irq_mask,
385 .irq_unmask = adp5585_irq_unmask,
386 .irq_bus_lock = adp5585_irq_bus_lock,
387 .irq_bus_sync_unlock = adp5585_irq_bus_sync_unlock,
388 .irq_set_type = adp5585_irq_set_type,
389 .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_IMMUTABLE,
390 GPIOCHIP_IRQ_RESOURCE_HELPERS,
391};
392
393static void adp5585_gpio_unreg_notifier(void *data)
394{
395 struct adp5585_gpio_dev *adp5585_gpio = data;
396 struct device *dev = adp5585_gpio->gpio_chip.parent;
397 struct adp5585_dev *adp5585 = dev_get_drvdata(dev: dev->parent);
398
399 blocking_notifier_chain_unregister(nh: &adp5585->event_notifier,
400 nb: &adp5585_gpio->nb);
401}
402
403static int adp5585_gpio_probe(struct platform_device *pdev)
404{
405 struct adp5585_dev *adp5585 = dev_get_drvdata(dev: pdev->dev.parent);
406 const struct platform_device_id *id = platform_get_device_id(pdev);
407 struct adp5585_gpio_dev *adp5585_gpio;
408 struct device *dev = &pdev->dev;
409 struct gpio_irq_chip *girq;
410 struct gpio_chip *gc;
411 int ret;
412
413 adp5585_gpio = devm_kzalloc(dev, size: sizeof(*adp5585_gpio), GFP_KERNEL);
414 if (!adp5585_gpio)
415 return -ENOMEM;
416
417 adp5585_gpio->regmap = adp5585->regmap;
418
419 adp5585_gpio->info = (const struct adp5585_gpio_chip *)id->driver_data;
420 if (!adp5585_gpio->info)
421 return -ENODEV;
422
423 device_set_of_node_from_dev(dev, dev2: dev->parent);
424
425 gc = &adp5585_gpio->gpio_chip;
426 gc->parent = dev;
427 gc->get_direction = adp5585_gpio_get_direction;
428 gc->direction_input = adp5585_gpio_direction_input;
429 gc->direction_output = adp5585_gpio_direction_output;
430 gc->get = adp5585_gpio_get_value;
431 gc->set = adp5585_gpio_set_value;
432 gc->set_config = adp5585_gpio_set_config;
433 gc->request = adp5585_gpio_request;
434 gc->free = adp5585_gpio_free;
435 gc->can_sleep = true;
436
437 gc->base = -1;
438 gc->ngpio = adp5585->n_pins;
439 gc->label = pdev->name;
440 gc->owner = THIS_MODULE;
441
442 if (device_property_present(dev: dev->parent, propname: "interrupt-controller")) {
443 if (!adp5585->irq)
444 return dev_err_probe(dev, err: -EINVAL,
445 fmt: "Unable to serve as interrupt controller without IRQ\n");
446
447 girq = &adp5585_gpio->gpio_chip.irq;
448 gpio_irq_chip_set_chip(girq, chip: &adp5585_irq_chip);
449 girq->handler = handle_bad_irq;
450 girq->threaded = true;
451
452 adp5585_gpio->nb.notifier_call = adp5585_gpio_key_event;
453 ret = blocking_notifier_chain_register(nh: &adp5585->event_notifier,
454 nb: &adp5585_gpio->nb);
455 if (ret)
456 return ret;
457
458 ret = devm_add_action_or_reset(dev, adp5585_gpio_unreg_notifier,
459 adp5585_gpio);
460 if (ret)
461 return ret;
462 }
463
464 /* everything masked by default */
465 adp5585_gpio->irq_mask = ~0UL;
466
467 ret = devm_mutex_init(dev, &adp5585_gpio->bus_lock);
468 if (ret)
469 return ret;
470 ret = devm_gpiochip_add_data(dev, &adp5585_gpio->gpio_chip,
471 adp5585_gpio);
472 if (ret)
473 return dev_err_probe(dev, err: ret, fmt: "failed to add GPIO chip\n");
474
475 return 0;
476}
477
478static const struct adp5585_gpio_chip adp5585_gpio_chip_info = {
479 .bank = adp5585_gpio_bank,
480 .bit = adp5585_gpio_bit,
481 .debounce_dis_a = ADP5585_DEBOUNCE_DIS_A,
482 .rpull_cfg_a = ADP5585_RPULL_CONFIG_A,
483 .gpo_data_a = ADP5585_GPO_DATA_OUT_A,
484 .gpo_out_a = ADP5585_GPO_OUT_MODE_A,
485 .gpio_dir_a = ADP5585_GPIO_DIRECTION_A,
486 .gpi_stat_a = ADP5585_GPI_STATUS_A,
487 .has_bias_hole = true,
488 .gpi_ev_min = ADP5585_GPI_EVENT_START,
489 .gpi_ev_max = ADP5585_GPI_EVENT_END,
490 .gpi_int_lvl_a = ADP5585_GPI_INT_LEVEL_A,
491 .gpi_ev_a = ADP5585_GPI_EVENT_EN_A,
492};
493
494static const struct adp5585_gpio_chip adp5589_gpio_chip_info = {
495 .bank = adp5589_gpio_bank,
496 .bit = adp5589_gpio_bit,
497 .debounce_dis_a = ADP5589_DEBOUNCE_DIS_A,
498 .rpull_cfg_a = ADP5589_RPULL_CONFIG_A,
499 .gpo_data_a = ADP5589_GPO_DATA_OUT_A,
500 .gpo_out_a = ADP5589_GPO_OUT_MODE_A,
501 .gpio_dir_a = ADP5589_GPIO_DIRECTION_A,
502 .gpi_stat_a = ADP5589_GPI_STATUS_A,
503 .gpi_ev_min = ADP5589_GPI_EVENT_START,
504 .gpi_ev_max = ADP5589_GPI_EVENT_END,
505 .gpi_int_lvl_a = ADP5589_GPI_INT_LEVEL_A,
506 .gpi_ev_a = ADP5589_GPI_EVENT_EN_A,
507};
508
509static const struct platform_device_id adp5585_gpio_id_table[] = {
510 { "adp5585-gpio", (kernel_ulong_t)&adp5585_gpio_chip_info },
511 { "adp5589-gpio", (kernel_ulong_t)&adp5589_gpio_chip_info },
512 { /* Sentinel */ }
513};
514MODULE_DEVICE_TABLE(platform, adp5585_gpio_id_table);
515
516static struct platform_driver adp5585_gpio_driver = {
517 .driver = {
518 .name = "adp5585-gpio",
519 },
520 .probe = adp5585_gpio_probe,
521 .id_table = adp5585_gpio_id_table,
522};
523module_platform_driver(adp5585_gpio_driver);
524
525MODULE_AUTHOR("Haibo Chen <haibo.chen@nxp.com>");
526MODULE_DESCRIPTION("GPIO ADP5585 Driver");
527MODULE_LICENSE("GPL");
528

source code of linux/drivers/gpio/gpio-adp5585.c