| 1 | /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */ |
| 2 | /* Copyright(c) 2014 - 2020 Intel Corporation */ |
| 3 | #ifndef __ICP_QAT_UCLO_H__ |
| 4 | #define __ICP_QAT_UCLO_H__ |
| 5 | |
| 6 | #define ICP_QAT_AC_895XCC_DEV_TYPE 0x00400000 |
| 7 | #define ICP_QAT_AC_C62X_DEV_TYPE 0x01000000 |
| 8 | #define ICP_QAT_AC_C3XXX_DEV_TYPE 0x02000000 |
| 9 | #define ICP_QAT_AC_4XXX_A_DEV_TYPE 0x08000000 |
| 10 | #define ICP_QAT_AC_6XXX_DEV_TYPE 0x80000000 |
| 11 | #define ICP_QAT_UCLO_MAX_AE 17 |
| 12 | #define ICP_QAT_UCLO_MAX_CTX 8 |
| 13 | #define ICP_QAT_UCLO_MAX_UIMAGE (ICP_QAT_UCLO_MAX_AE * ICP_QAT_UCLO_MAX_CTX) |
| 14 | #define ICP_QAT_UCLO_MAX_USTORE 0x4000 |
| 15 | #define ICP_QAT_UCLO_MAX_XFER_REG 128 |
| 16 | #define ICP_QAT_UCLO_MAX_GPR_REG 128 |
| 17 | #define ICP_QAT_UCLO_MAX_LMEM_REG 1024 |
| 18 | #define ICP_QAT_UCLO_MAX_LMEM_REG_2X 1280 |
| 19 | #define ICP_QAT_UCLO_AE_ALL_CTX 0xff |
| 20 | #define ICP_QAT_UOF_OBJID_LEN 8 |
| 21 | #define ICP_QAT_UOF_FID 0xc6c2 |
| 22 | #define ICP_QAT_UOF_MAJVER 0x4 |
| 23 | #define ICP_QAT_UOF_MINVER 0x11 |
| 24 | #define ICP_QAT_UOF_OBJS "UOF_OBJS" |
| 25 | #define ICP_QAT_UOF_STRT "UOF_STRT" |
| 26 | #define ICP_QAT_UOF_IMAG "UOF_IMAG" |
| 27 | #define ICP_QAT_UOF_IMEM "UOF_IMEM" |
| 28 | #define ICP_QAT_UOF_LOCAL_SCOPE 1 |
| 29 | #define ICP_QAT_UOF_INIT_EXPR 0 |
| 30 | #define ICP_QAT_UOF_INIT_REG 1 |
| 31 | #define ICP_QAT_UOF_INIT_REG_CTX 2 |
| 32 | #define ICP_QAT_UOF_INIT_EXPR_ENDIAN_SWAP 3 |
| 33 | #define ICP_QAT_SUOF_OBJ_ID_LEN 8 |
| 34 | #define ICP_QAT_SUOF_FID 0x53554f46 |
| 35 | #define ICP_QAT_SUOF_MAJVER 0x0 |
| 36 | #define ICP_QAT_SUOF_MINVER 0x1 |
| 37 | #define ICP_QAT_SUOF_OBJ_NAME_LEN 128 |
| 38 | #define ICP_QAT_MOF_OBJ_ID_LEN 8 |
| 39 | #define ICP_QAT_MOF_OBJ_CHUNKID_LEN 8 |
| 40 | #define ICP_QAT_MOF_FID 0x00666f6d |
| 41 | #define ICP_QAT_MOF_MAJVER 0x0 |
| 42 | #define ICP_QAT_MOF_MINVER 0x1 |
| 43 | #define ICP_QAT_MOF_SYM_OBJS "SYM_OBJS" |
| 44 | #define ICP_QAT_SUOF_OBJS "SUF_OBJS" |
| 45 | #define ICP_QAT_SUOF_IMAG "SUF_IMAG" |
| 46 | #define ICP_QAT_SIMG_AE_INIT_SEQ_LEN (50 * sizeof(unsigned long long)) |
| 47 | |
| 48 | #define DSS_FWSK_MODULUS_LEN 384 /* RSA3K */ |
| 49 | #define DSS_FWSK_EXPONENT_LEN 4 |
| 50 | #define DSS_FWSK_PADDING_LEN 380 |
| 51 | #define DSS_SIGNATURE_LEN 384 /* RSA3K */ |
| 52 | |
| 53 | #define CSS_FWSK_MODULUS_LEN 256 /* RSA2K */ |
| 54 | #define CSS_FWSK_EXPONENT_LEN 4 |
| 55 | #define CSS_FWSK_PADDING_LEN 252 |
| 56 | #define CSS_SIGNATURE_LEN 256 /* RSA2K */ |
| 57 | |
| 58 | #define ICP_QAT_CSS_FWSK_MODULUS_LEN(handle) ((handle)->chip_info->css_3k ? \ |
| 59 | DSS_FWSK_MODULUS_LEN : \ |
| 60 | CSS_FWSK_MODULUS_LEN) |
| 61 | |
| 62 | #define ICP_QAT_CSS_FWSK_EXPONENT_LEN(handle) ((handle)->chip_info->css_3k ? \ |
| 63 | DSS_FWSK_EXPONENT_LEN : \ |
| 64 | CSS_FWSK_EXPONENT_LEN) |
| 65 | |
| 66 | #define ICP_QAT_CSS_FWSK_PAD_LEN(handle) ((handle)->chip_info->css_3k ? \ |
| 67 | DSS_FWSK_PADDING_LEN : \ |
| 68 | CSS_FWSK_PADDING_LEN) |
| 69 | |
| 70 | #define ICP_QAT_CSS_FWSK_PUB_LEN(handle) (ICP_QAT_CSS_FWSK_MODULUS_LEN(handle) + \ |
| 71 | ICP_QAT_CSS_FWSK_EXPONENT_LEN(handle) + \ |
| 72 | ICP_QAT_CSS_FWSK_PAD_LEN(handle)) |
| 73 | |
| 74 | #define ICP_QAT_CSS_SIGNATURE_LEN(handle) ((handle)->chip_info->css_3k ? \ |
| 75 | DSS_SIGNATURE_LEN : \ |
| 76 | CSS_SIGNATURE_LEN) |
| 77 | |
| 78 | #define ICP_QAT_AE_IMG_OFFSET(handle) (sizeof(struct icp_qat_css_hdr) + \ |
| 79 | ICP_QAT_CSS_FWSK_MODULUS_LEN(handle) + \ |
| 80 | ICP_QAT_CSS_FWSK_EXPONENT_LEN(handle) + \ |
| 81 | ICP_QAT_CSS_SIGNATURE_LEN(handle)) |
| 82 | #define ICP_QAT_CSS_RSA4K_MAX_IMAGE_LEN 0x40000 |
| 83 | #define ICP_QAT_CSS_RSA3K_MAX_IMAGE_LEN 0x30000 |
| 84 | |
| 85 | /* All lengths below are in bytes */ |
| 86 | #define ICP_QAT_DUALSIGN_OPAQUE_HDR_LEN 12 |
| 87 | #define ICP_QAT_DUALSIGN_OPAQUE_HDR_ALIGN_LEN 16 |
| 88 | #define ICP_QAT_DUALSIGN_OPAQUE_DATA_LEN 3540 |
| 89 | #define ICP_QAT_DUALSIGN_XMSS_PUBKEY_LEN 64 |
| 90 | #define ICP_QAT_DUALSIGN_XMSS_SIG_LEN 2692 |
| 91 | #define ICP_QAT_DUALSIGN_XMSS_SIG_ALIGN_LEN 2696 |
| 92 | #define ICP_QAT_DUALSIGN_MISC_INFO_LEN 16 |
| 93 | #define ICP_QAT_DUALSIGN_FW_TYPE_LEN 7 |
| 94 | #define ICP_QAT_DUALSIGN_MODULE_TYPE 0x14 |
| 95 | #define ICP_QAT_DUALSIGN_HDR_LEN 0x375 |
| 96 | #define ICP_QAT_DUALSIGN_HDR_VER 0x40001 |
| 97 | #define ICP_QAT_DUALSIGN_HDR_LEN_OFFSET 4 |
| 98 | #define ICP_QAT_DUALSIGN_HDR_VER_OFFSET 8 |
| 99 | |
| 100 | #define ICP_QAT_CTX_MODE(ae_mode) ((ae_mode) & 0xf) |
| 101 | #define ICP_QAT_NN_MODE(ae_mode) (((ae_mode) >> 0x4) & 0xf) |
| 102 | #define ICP_QAT_SHARED_USTORE_MODE(ae_mode) (((ae_mode) >> 0xb) & 0x1) |
| 103 | #define RELOADABLE_CTX_SHARED_MODE(ae_mode) (((ae_mode) >> 0xc) & 0x1) |
| 104 | |
| 105 | #define ICP_QAT_LOC_MEM0_MODE(ae_mode) (((ae_mode) >> 0x8) & 0x1) |
| 106 | #define ICP_QAT_LOC_MEM1_MODE(ae_mode) (((ae_mode) >> 0x9) & 0x1) |
| 107 | #define ICP_QAT_LOC_MEM2_MODE(ae_mode) (((ae_mode) >> 0x6) & 0x1) |
| 108 | #define ICP_QAT_LOC_MEM3_MODE(ae_mode) (((ae_mode) >> 0x7) & 0x1) |
| 109 | #define ICP_QAT_LOC_TINDEX_MODE(ae_mode) (((ae_mode) >> 0xe) & 0x1) |
| 110 | |
| 111 | enum icp_qat_uof_mem_region { |
| 112 | ICP_QAT_UOF_SRAM_REGION = 0x0, |
| 113 | ICP_QAT_UOF_LMEM_REGION = 0x3, |
| 114 | ICP_QAT_UOF_UMEM_REGION = 0x5 |
| 115 | }; |
| 116 | |
| 117 | enum icp_qat_uof_regtype { |
| 118 | ICP_NO_DEST = 0, |
| 119 | ICP_GPA_REL = 1, |
| 120 | ICP_GPA_ABS = 2, |
| 121 | ICP_GPB_REL = 3, |
| 122 | ICP_GPB_ABS = 4, |
| 123 | ICP_SR_REL = 5, |
| 124 | ICP_SR_RD_REL = 6, |
| 125 | ICP_SR_WR_REL = 7, |
| 126 | ICP_SR_ABS = 8, |
| 127 | ICP_SR_RD_ABS = 9, |
| 128 | ICP_SR_WR_ABS = 10, |
| 129 | ICP_DR_REL = 19, |
| 130 | ICP_DR_RD_REL = 20, |
| 131 | ICP_DR_WR_REL = 21, |
| 132 | ICP_DR_ABS = 22, |
| 133 | ICP_DR_RD_ABS = 23, |
| 134 | ICP_DR_WR_ABS = 24, |
| 135 | ICP_LMEM = 26, |
| 136 | ICP_LMEM0 = 27, |
| 137 | ICP_LMEM1 = 28, |
| 138 | ICP_NEIGH_REL = 31, |
| 139 | ICP_LMEM2 = 61, |
| 140 | ICP_LMEM3 = 62, |
| 141 | }; |
| 142 | |
| 143 | enum icp_qat_css_fwtype { |
| 144 | CSS_AE_FIRMWARE = 0, |
| 145 | CSS_MMP_FIRMWARE = 1 |
| 146 | }; |
| 147 | |
| 148 | struct icp_qat_uclo_page { |
| 149 | struct icp_qat_uclo_encap_page *encap_page; |
| 150 | struct icp_qat_uclo_region *region; |
| 151 | unsigned int flags; |
| 152 | }; |
| 153 | |
| 154 | struct icp_qat_uclo_region { |
| 155 | struct icp_qat_uclo_page *loaded; |
| 156 | struct icp_qat_uclo_page *page; |
| 157 | }; |
| 158 | |
| 159 | struct icp_qat_uclo_aeslice { |
| 160 | struct icp_qat_uclo_region *region; |
| 161 | struct icp_qat_uclo_page *page; |
| 162 | struct icp_qat_uclo_page *cur_page[ICP_QAT_UCLO_MAX_CTX]; |
| 163 | struct icp_qat_uclo_encapme *encap_image; |
| 164 | unsigned int ctx_mask_assigned; |
| 165 | unsigned int new_uaddr[ICP_QAT_UCLO_MAX_CTX]; |
| 166 | }; |
| 167 | |
| 168 | struct icp_qat_uclo_aedata { |
| 169 | unsigned int slice_num; |
| 170 | unsigned int eff_ustore_size; |
| 171 | struct icp_qat_uclo_aeslice ae_slices[ICP_QAT_UCLO_MAX_CTX]; |
| 172 | }; |
| 173 | |
| 174 | struct icp_qat_uof_encap_obj { |
| 175 | char *beg_uof; |
| 176 | struct icp_qat_uof_objhdr *obj_hdr; |
| 177 | struct icp_qat_uof_chunkhdr *chunk_hdr; |
| 178 | struct icp_qat_uof_varmem_seg *var_mem_seg; |
| 179 | }; |
| 180 | |
| 181 | struct icp_qat_uclo_encap_uwblock { |
| 182 | unsigned int start_addr; |
| 183 | unsigned int words_num; |
| 184 | u64 micro_words; |
| 185 | }; |
| 186 | |
| 187 | struct icp_qat_uclo_encap_page { |
| 188 | unsigned int def_page; |
| 189 | unsigned int page_region; |
| 190 | unsigned int beg_addr_v; |
| 191 | unsigned int beg_addr_p; |
| 192 | unsigned int micro_words_num; |
| 193 | unsigned int uwblock_num; |
| 194 | struct icp_qat_uclo_encap_uwblock *uwblock; |
| 195 | }; |
| 196 | |
| 197 | struct icp_qat_uclo_encapme { |
| 198 | struct icp_qat_uof_image *img_ptr; |
| 199 | struct icp_qat_uclo_encap_page *page; |
| 200 | unsigned int ae_reg_num; |
| 201 | struct icp_qat_uof_ae_reg *ae_reg; |
| 202 | unsigned int init_regsym_num; |
| 203 | struct icp_qat_uof_init_regsym *init_regsym; |
| 204 | unsigned int sbreak_num; |
| 205 | struct icp_qat_uof_sbreak *sbreak; |
| 206 | unsigned int uwords_num; |
| 207 | }; |
| 208 | |
| 209 | struct icp_qat_uclo_init_mem_table { |
| 210 | unsigned int entry_num; |
| 211 | struct icp_qat_uof_initmem *init_mem; |
| 212 | }; |
| 213 | |
| 214 | struct icp_qat_uclo_objhdr { |
| 215 | char *file_buff; |
| 216 | unsigned int checksum; |
| 217 | unsigned int size; |
| 218 | }; |
| 219 | |
| 220 | struct icp_qat_uof_strtable { |
| 221 | unsigned int table_len; |
| 222 | unsigned int reserved; |
| 223 | u64 strings; |
| 224 | }; |
| 225 | |
| 226 | struct icp_qat_uclo_objhandle { |
| 227 | unsigned int prod_type; |
| 228 | unsigned int prod_rev; |
| 229 | struct icp_qat_uclo_objhdr *obj_hdr; |
| 230 | struct icp_qat_uof_encap_obj encap_uof_obj; |
| 231 | struct icp_qat_uof_strtable str_table; |
| 232 | struct icp_qat_uclo_encapme ae_uimage[ICP_QAT_UCLO_MAX_UIMAGE]; |
| 233 | struct icp_qat_uclo_aedata ae_data[ICP_QAT_UCLO_MAX_AE]; |
| 234 | struct icp_qat_uclo_init_mem_table init_mem_tab; |
| 235 | struct icp_qat_uof_batch_init *lm_init_tab[ICP_QAT_UCLO_MAX_AE]; |
| 236 | struct icp_qat_uof_batch_init *umem_init_tab[ICP_QAT_UCLO_MAX_AE]; |
| 237 | int uimage_num; |
| 238 | int uword_in_bytes; |
| 239 | int global_inited; |
| 240 | unsigned int ae_num; |
| 241 | unsigned int ustore_phy_size; |
| 242 | void *obj_buf; |
| 243 | u64 *uword_buf; |
| 244 | }; |
| 245 | |
| 246 | struct icp_qat_uof_uword_block { |
| 247 | unsigned int start_addr; |
| 248 | unsigned int words_num; |
| 249 | unsigned int uword_offset; |
| 250 | unsigned int reserved; |
| 251 | }; |
| 252 | |
| 253 | struct icp_qat_uof_filehdr { |
| 254 | unsigned short file_id; |
| 255 | unsigned short reserved1; |
| 256 | char min_ver; |
| 257 | char maj_ver; |
| 258 | unsigned short reserved2; |
| 259 | unsigned short max_chunks; |
| 260 | unsigned short num_chunks; |
| 261 | }; |
| 262 | |
| 263 | struct icp_qat_uof_filechunkhdr { |
| 264 | char chunk_id[ICP_QAT_UOF_OBJID_LEN]; |
| 265 | unsigned int checksum; |
| 266 | unsigned int offset; |
| 267 | unsigned int size; |
| 268 | }; |
| 269 | |
| 270 | struct icp_qat_uof_objhdr { |
| 271 | unsigned int ac_dev_type; |
| 272 | unsigned short min_cpu_ver; |
| 273 | unsigned short max_cpu_ver; |
| 274 | short max_chunks; |
| 275 | short num_chunks; |
| 276 | unsigned int reserved1; |
| 277 | unsigned int reserved2; |
| 278 | }; |
| 279 | |
| 280 | struct icp_qat_uof_chunkhdr { |
| 281 | char chunk_id[ICP_QAT_UOF_OBJID_LEN]; |
| 282 | unsigned int offset; |
| 283 | unsigned int size; |
| 284 | }; |
| 285 | |
| 286 | struct icp_qat_uof_memvar_attr { |
| 287 | unsigned int offset_in_byte; |
| 288 | unsigned int value; |
| 289 | }; |
| 290 | |
| 291 | struct icp_qat_uof_initmem { |
| 292 | unsigned int sym_name; |
| 293 | char region; |
| 294 | char scope; |
| 295 | unsigned short reserved1; |
| 296 | unsigned int addr; |
| 297 | unsigned int num_in_bytes; |
| 298 | unsigned int val_attr_num; |
| 299 | }; |
| 300 | |
| 301 | struct icp_qat_uof_init_regsym { |
| 302 | unsigned int sym_name; |
| 303 | char init_type; |
| 304 | char value_type; |
| 305 | char reg_type; |
| 306 | unsigned char ctx; |
| 307 | unsigned int reg_addr; |
| 308 | unsigned int value; |
| 309 | }; |
| 310 | |
| 311 | struct icp_qat_uof_varmem_seg { |
| 312 | unsigned int sram_base; |
| 313 | unsigned int sram_size; |
| 314 | unsigned int sram_alignment; |
| 315 | unsigned int sdram_base; |
| 316 | unsigned int sdram_size; |
| 317 | unsigned int sdram_alignment; |
| 318 | unsigned int sdram1_base; |
| 319 | unsigned int sdram1_size; |
| 320 | unsigned int sdram1_alignment; |
| 321 | unsigned int scratch_base; |
| 322 | unsigned int scratch_size; |
| 323 | unsigned int scratch_alignment; |
| 324 | }; |
| 325 | |
| 326 | struct icp_qat_uof_gtid { |
| 327 | char tool_id[ICP_QAT_UOF_OBJID_LEN]; |
| 328 | int tool_ver; |
| 329 | unsigned int reserved1; |
| 330 | unsigned int reserved2; |
| 331 | }; |
| 332 | |
| 333 | struct icp_qat_uof_sbreak { |
| 334 | unsigned int page_num; |
| 335 | unsigned int virt_uaddr; |
| 336 | unsigned char sbreak_type; |
| 337 | unsigned char reg_type; |
| 338 | unsigned short reserved1; |
| 339 | unsigned int addr_offset; |
| 340 | unsigned int reg_addr; |
| 341 | }; |
| 342 | |
| 343 | struct icp_qat_uof_code_page { |
| 344 | unsigned int page_region; |
| 345 | unsigned int page_num; |
| 346 | unsigned char def_page; |
| 347 | unsigned char reserved2; |
| 348 | unsigned short reserved1; |
| 349 | unsigned int beg_addr_v; |
| 350 | unsigned int beg_addr_p; |
| 351 | unsigned int neigh_reg_tab_offset; |
| 352 | unsigned int uc_var_tab_offset; |
| 353 | unsigned int imp_var_tab_offset; |
| 354 | unsigned int imp_expr_tab_offset; |
| 355 | unsigned int code_area_offset; |
| 356 | }; |
| 357 | |
| 358 | struct icp_qat_uof_image { |
| 359 | unsigned int img_name; |
| 360 | unsigned int ae_assigned; |
| 361 | unsigned int ctx_assigned; |
| 362 | unsigned int ac_dev_type; |
| 363 | unsigned int entry_address; |
| 364 | unsigned int fill_pattern[2]; |
| 365 | unsigned int reloadable_size; |
| 366 | unsigned char sensitivity; |
| 367 | unsigned char reserved; |
| 368 | unsigned short ae_mode; |
| 369 | unsigned short max_ver; |
| 370 | unsigned short min_ver; |
| 371 | unsigned short image_attrib; |
| 372 | unsigned short reserved2; |
| 373 | unsigned short page_region_num; |
| 374 | unsigned short numpages; |
| 375 | unsigned int reg_tab_offset; |
| 376 | unsigned int init_reg_sym_tab; |
| 377 | unsigned int sbreak_tab; |
| 378 | unsigned int app_metadata; |
| 379 | }; |
| 380 | |
| 381 | struct icp_qat_uof_objtable { |
| 382 | unsigned int entry_num; |
| 383 | }; |
| 384 | |
| 385 | struct icp_qat_uof_ae_reg { |
| 386 | unsigned int name; |
| 387 | unsigned int vis_name; |
| 388 | unsigned short type; |
| 389 | unsigned short addr; |
| 390 | unsigned short access_mode; |
| 391 | unsigned char visible; |
| 392 | unsigned char reserved1; |
| 393 | unsigned short ref_count; |
| 394 | unsigned short reserved2; |
| 395 | unsigned int xo_id; |
| 396 | }; |
| 397 | |
| 398 | struct icp_qat_uof_code_area { |
| 399 | unsigned int micro_words_num; |
| 400 | unsigned int uword_block_tab; |
| 401 | }; |
| 402 | |
| 403 | struct icp_qat_uof_batch_init { |
| 404 | unsigned int ae; |
| 405 | unsigned int addr; |
| 406 | unsigned int *value; |
| 407 | unsigned int size; |
| 408 | struct icp_qat_uof_batch_init *next; |
| 409 | }; |
| 410 | |
| 411 | struct icp_qat_suof_img_hdr { |
| 412 | char *simg_buf; |
| 413 | unsigned long simg_len; |
| 414 | char *; |
| 415 | char *css_simg; |
| 416 | unsigned long simg_size; |
| 417 | unsigned int ae_num; |
| 418 | unsigned int ae_mask; |
| 419 | unsigned int fw_type; |
| 420 | unsigned long simg_name; |
| 421 | unsigned long appmeta_data; |
| 422 | }; |
| 423 | |
| 424 | struct icp_qat_suof_img_tbl { |
| 425 | unsigned int num_simgs; |
| 426 | struct icp_qat_suof_img_hdr *simg_hdr; |
| 427 | }; |
| 428 | |
| 429 | struct icp_qat_suof_handle { |
| 430 | unsigned int file_id; |
| 431 | unsigned int check_sum; |
| 432 | char min_ver; |
| 433 | char maj_ver; |
| 434 | char fw_type; |
| 435 | char *suof_buf; |
| 436 | unsigned int suof_size; |
| 437 | char *sym_str; |
| 438 | unsigned int sym_size; |
| 439 | struct icp_qat_suof_img_tbl img_table; |
| 440 | }; |
| 441 | |
| 442 | struct icp_qat_fw_auth_desc { |
| 443 | unsigned int img_len; |
| 444 | unsigned int ae_mask; |
| 445 | unsigned int css_hdr_high; |
| 446 | unsigned int css_hdr_low; |
| 447 | unsigned int img_high; |
| 448 | unsigned int img_low; |
| 449 | unsigned int signature_high; |
| 450 | unsigned int signature_low; |
| 451 | unsigned int fwsk_pub_high; |
| 452 | unsigned int fwsk_pub_low; |
| 453 | unsigned int img_ae_mode_data_high; |
| 454 | unsigned int img_ae_mode_data_low; |
| 455 | unsigned int img_ae_init_data_high; |
| 456 | unsigned int img_ae_init_data_low; |
| 457 | unsigned int img_ae_insts_high; |
| 458 | unsigned int img_ae_insts_low; |
| 459 | unsigned int cpp_mask; |
| 460 | unsigned int reserved; |
| 461 | unsigned int xmss_pubkey_high; |
| 462 | unsigned int xmss_pubkey_low; |
| 463 | unsigned int xmss_sig_high; |
| 464 | unsigned int xmss_sig_low; |
| 465 | unsigned int reserved2[2]; |
| 466 | }; |
| 467 | |
| 468 | struct icp_qat_auth_chunk { |
| 469 | struct icp_qat_fw_auth_desc fw_auth_desc; |
| 470 | u64 chunk_size; |
| 471 | u64 chunk_bus_addr; |
| 472 | }; |
| 473 | |
| 474 | struct icp_qat_css_hdr { |
| 475 | unsigned int module_type; |
| 476 | unsigned int ; |
| 477 | unsigned int ; |
| 478 | unsigned int module_id; |
| 479 | unsigned int module_vendor; |
| 480 | unsigned int date; |
| 481 | unsigned int size; |
| 482 | unsigned int key_size; |
| 483 | unsigned int module_size; |
| 484 | unsigned int exponent_size; |
| 485 | unsigned int fw_type; |
| 486 | unsigned int reserved[21]; |
| 487 | }; |
| 488 | |
| 489 | struct icp_qat_simg_ae_mode { |
| 490 | unsigned int file_id; |
| 491 | unsigned short maj_ver; |
| 492 | unsigned short min_ver; |
| 493 | unsigned int dev_type; |
| 494 | unsigned short devmax_ver; |
| 495 | unsigned short devmin_ver; |
| 496 | unsigned int ae_mask; |
| 497 | unsigned int ctx_enables; |
| 498 | char fw_type; |
| 499 | char ctx_mode; |
| 500 | char nn_mode; |
| 501 | char lm0_mode; |
| 502 | char lm1_mode; |
| 503 | char scs_mode; |
| 504 | char lm2_mode; |
| 505 | char lm3_mode; |
| 506 | char tindex_mode; |
| 507 | unsigned char reserved[7]; |
| 508 | char simg_name[256]; |
| 509 | char appmeta_data[256]; |
| 510 | }; |
| 511 | |
| 512 | struct icp_qat_suof_filehdr { |
| 513 | unsigned int file_id; |
| 514 | unsigned int check_sum; |
| 515 | char min_ver; |
| 516 | char maj_ver; |
| 517 | char fw_type; |
| 518 | char reserved; |
| 519 | unsigned short max_chunks; |
| 520 | unsigned short num_chunks; |
| 521 | }; |
| 522 | |
| 523 | struct icp_qat_suof_chunk_hdr { |
| 524 | char chunk_id[ICP_QAT_SUOF_OBJ_ID_LEN]; |
| 525 | u64 offset; |
| 526 | u64 size; |
| 527 | }; |
| 528 | |
| 529 | struct icp_qat_suof_strtable { |
| 530 | unsigned int tab_length; |
| 531 | unsigned int strings; |
| 532 | }; |
| 533 | |
| 534 | struct icp_qat_suof_objhdr { |
| 535 | unsigned int img_length; |
| 536 | unsigned int reserved; |
| 537 | }; |
| 538 | |
| 539 | struct icp_qat_mof_file_hdr { |
| 540 | unsigned int file_id; |
| 541 | unsigned int checksum; |
| 542 | char min_ver; |
| 543 | char maj_ver; |
| 544 | unsigned short reserved; |
| 545 | unsigned short max_chunks; |
| 546 | unsigned short num_chunks; |
| 547 | }; |
| 548 | |
| 549 | struct icp_qat_mof_chunkhdr { |
| 550 | char chunk_id[ICP_QAT_MOF_OBJ_ID_LEN]; |
| 551 | u64 offset; |
| 552 | u64 size; |
| 553 | }; |
| 554 | |
| 555 | struct icp_qat_mof_str_table { |
| 556 | unsigned int tab_len; |
| 557 | unsigned int strings; |
| 558 | }; |
| 559 | |
| 560 | struct icp_qat_mof_obj_hdr { |
| 561 | unsigned short max_chunks; |
| 562 | unsigned short num_chunks; |
| 563 | unsigned int reserved; |
| 564 | }; |
| 565 | |
| 566 | struct icp_qat_mof_obj_chunkhdr { |
| 567 | char chunk_id[ICP_QAT_MOF_OBJ_CHUNKID_LEN]; |
| 568 | u64 offset; |
| 569 | u64 size; |
| 570 | unsigned int name; |
| 571 | unsigned int reserved; |
| 572 | }; |
| 573 | |
| 574 | struct icp_qat_mof_objhdr { |
| 575 | char *obj_name; |
| 576 | char *obj_buf; |
| 577 | unsigned int obj_size; |
| 578 | }; |
| 579 | |
| 580 | struct icp_qat_mof_table { |
| 581 | unsigned int num_objs; |
| 582 | struct icp_qat_mof_objhdr *obj_hdr; |
| 583 | }; |
| 584 | |
| 585 | struct icp_qat_mof_handle { |
| 586 | unsigned int file_id; |
| 587 | unsigned int checksum; |
| 588 | char min_ver; |
| 589 | char maj_ver; |
| 590 | char *mof_buf; |
| 591 | u32 mof_size; |
| 592 | char *sym_str; |
| 593 | unsigned int sym_size; |
| 594 | char *uobjs_hdr; |
| 595 | char *sobjs_hdr; |
| 596 | struct icp_qat_mof_table obj_table; |
| 597 | }; |
| 598 | #endif |
| 599 | |