1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * RSB (Reduced Serial Bus) driver.
4 *
5 * Author: Chen-Yu Tsai <wens@csie.org>
6 *
7 * The RSB controller looks like an SMBus controller which only supports
8 * byte and word data transfers. But, it differs from standard SMBus
9 * protocol on several aspects:
10 * - it uses addresses set at runtime to address slaves. Runtime addresses
11 * are sent to slaves using their 12bit hardware addresses. Up to 15
12 * runtime addresses are available.
13 * - it adds a parity bit every 8bits of data and address for read and
14 * write accesses; this replaces the ack bit
15 * - only one read access is required to read a byte (instead of a write
16 * followed by a read access in standard SMBus protocol)
17 * - there's no Ack bit after each read access
18 *
19 * This means this bus cannot be used to interface with standard SMBus
20 * devices. Devices known to support this interface include the AXP223,
21 * AXP809, and AXP806 PMICs, and the AC100 audio codec, all from X-Powers.
22 *
23 * A description of the operation and wire protocol can be found in the
24 * RSB section of Allwinner's A80 user manual, which can be found at
25 *
26 * https://github.com/allwinner-zh/documents/tree/master/A80
27 *
28 * This document is officially released by Allwinner.
29 *
30 * This driver is based on i2c-sun6i-p2wi.c, the P2WI bus driver.
31 */
32
33#include <linux/clk.h>
34#include <linux/clk/clk-conf.h>
35#include <linux/device.h>
36#include <linux/interrupt.h>
37#include <linux/io.h>
38#include <linux/iopoll.h>
39#include <linux/module.h>
40#include <linux/of.h>
41#include <linux/of_irq.h>
42#include <linux/of_device.h>
43#include <linux/platform_device.h>
44#include <linux/pm.h>
45#include <linux/pm_runtime.h>
46#include <linux/regmap.h>
47#include <linux/reset.h>
48#include <linux/slab.h>
49#include <linux/sunxi-rsb.h>
50#include <linux/types.h>
51
52/* RSB registers */
53#define RSB_CTRL 0x0 /* Global control */
54#define RSB_CCR 0x4 /* Clock control */
55#define RSB_INTE 0x8 /* Interrupt controls */
56#define RSB_INTS 0xc /* Interrupt status */
57#define RSB_ADDR 0x10 /* Address to send with read/write command */
58#define RSB_DATA 0x1c /* Data to read/write */
59#define RSB_LCR 0x24 /* Line control */
60#define RSB_DMCR 0x28 /* Device mode (init) control */
61#define RSB_CMD 0x2c /* RSB Command */
62#define RSB_DAR 0x30 /* Device address / runtime address */
63
64/* CTRL fields */
65#define RSB_CTRL_START_TRANS BIT(7)
66#define RSB_CTRL_ABORT_TRANS BIT(6)
67#define RSB_CTRL_GLOBAL_INT_ENB BIT(1)
68#define RSB_CTRL_SOFT_RST BIT(0)
69
70/* CLK CTRL fields */
71#define RSB_CCR_SDA_OUT_DELAY(v) (((v) & 0x7) << 8)
72#define RSB_CCR_MAX_CLK_DIV 0xff
73#define RSB_CCR_CLK_DIV(v) ((v) & RSB_CCR_MAX_CLK_DIV)
74
75/* STATUS fields */
76#define RSB_INTS_TRANS_ERR_ACK BIT(16)
77#define RSB_INTS_TRANS_ERR_DATA_BIT(v) (((v) >> 8) & 0xf)
78#define RSB_INTS_TRANS_ERR_DATA GENMASK(11, 8)
79#define RSB_INTS_LOAD_BSY BIT(2)
80#define RSB_INTS_TRANS_ERR BIT(1)
81#define RSB_INTS_TRANS_OVER BIT(0)
82
83/* LINE CTRL fields*/
84#define RSB_LCR_SCL_STATE BIT(5)
85#define RSB_LCR_SDA_STATE BIT(4)
86#define RSB_LCR_SCL_CTL BIT(3)
87#define RSB_LCR_SCL_CTL_EN BIT(2)
88#define RSB_LCR_SDA_CTL BIT(1)
89#define RSB_LCR_SDA_CTL_EN BIT(0)
90
91/* DEVICE MODE CTRL field values */
92#define RSB_DMCR_DEVICE_START BIT(31)
93#define RSB_DMCR_MODE_DATA (0x7c << 16)
94#define RSB_DMCR_MODE_REG (0x3e << 8)
95#define RSB_DMCR_DEV_ADDR 0x00
96
97/* CMD values */
98#define RSB_CMD_RD8 0x8b
99#define RSB_CMD_RD16 0x9c
100#define RSB_CMD_RD32 0xa6
101#define RSB_CMD_WR8 0x4e
102#define RSB_CMD_WR16 0x59
103#define RSB_CMD_WR32 0x63
104#define RSB_CMD_STRA 0xe8
105
106/* DAR fields */
107#define RSB_DAR_RTA(v) (((v) & 0xff) << 16)
108#define RSB_DAR_DA(v) ((v) & 0xffff)
109
110#define RSB_MAX_FREQ 20000000
111
112#define RSB_CTRL_NAME "sunxi-rsb"
113
114struct sunxi_rsb_addr_map {
115 u16 hwaddr;
116 u8 rtaddr;
117};
118
119struct sunxi_rsb {
120 struct device *dev;
121 void __iomem *regs;
122 struct clk *clk;
123 struct reset_control *rstc;
124 struct completion complete;
125 struct mutex lock;
126 unsigned int status;
127 u32 clk_freq;
128};
129
130/* bus / slave device related functions */
131static const struct bus_type sunxi_rsb_bus;
132
133static int sunxi_rsb_device_match(struct device *dev, const struct device_driver *drv)
134{
135 return of_driver_match_device(dev, drv);
136}
137
138static int sunxi_rsb_device_probe(struct device *dev)
139{
140 const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(d: dev->driver);
141 struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(d: dev);
142 int ret;
143
144 if (!drv->probe)
145 return -ENODEV;
146
147 if (!rdev->irq) {
148 int irq = -ENOENT;
149
150 if (dev->of_node)
151 irq = of_irq_get(dev: dev->of_node, index: 0);
152
153 if (irq == -EPROBE_DEFER)
154 return irq;
155 if (irq < 0)
156 irq = 0;
157
158 rdev->irq = irq;
159 }
160
161 ret = of_clk_set_defaults(node: dev->of_node, clk_supplier: false);
162 if (ret < 0)
163 return ret;
164
165 return drv->probe(rdev);
166}
167
168static void sunxi_rsb_device_remove(struct device *dev)
169{
170 const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(d: dev->driver);
171
172 drv->remove(to_sunxi_rsb_device(d: dev));
173}
174
175static int sunxi_rsb_device_modalias(const struct device *dev, struct kobj_uevent_env *env)
176{
177 return of_device_uevent_modalias(dev, env);
178}
179
180static const struct bus_type sunxi_rsb_bus = {
181 .name = RSB_CTRL_NAME,
182 .match = sunxi_rsb_device_match,
183 .probe = sunxi_rsb_device_probe,
184 .remove = sunxi_rsb_device_remove,
185 .uevent = sunxi_rsb_device_modalias,
186};
187
188static void sunxi_rsb_dev_release(struct device *dev)
189{
190 struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(d: dev);
191
192 kfree(objp: rdev);
193}
194
195/**
196 * sunxi_rsb_device_create() - allocate and add an RSB device
197 * @rsb: RSB controller
198 * @node: RSB slave device node
199 * @hwaddr: RSB slave hardware address
200 * @rtaddr: RSB slave runtime address
201 */
202static struct sunxi_rsb_device *sunxi_rsb_device_create(struct sunxi_rsb *rsb,
203 struct device_node *node, u16 hwaddr, u8 rtaddr)
204{
205 int err;
206 struct sunxi_rsb_device *rdev;
207
208 rdev = kzalloc(sizeof(*rdev), GFP_KERNEL);
209 if (!rdev)
210 return ERR_PTR(error: -ENOMEM);
211
212 rdev->rsb = rsb;
213 rdev->hwaddr = hwaddr;
214 rdev->rtaddr = rtaddr;
215 rdev->dev.bus = &sunxi_rsb_bus;
216 rdev->dev.parent = rsb->dev;
217 rdev->dev.of_node = node;
218 rdev->dev.release = sunxi_rsb_dev_release;
219
220 dev_set_name(dev: &rdev->dev, name: "%s-%x", RSB_CTRL_NAME, hwaddr);
221
222 err = device_register(dev: &rdev->dev);
223 if (err < 0) {
224 dev_err(&rdev->dev, "Can't add %s, status %d\n",
225 dev_name(&rdev->dev), err);
226 goto err_device_add;
227 }
228
229 dev_dbg(&rdev->dev, "device %s registered\n", dev_name(&rdev->dev));
230
231 return rdev;
232
233err_device_add:
234 put_device(dev: &rdev->dev);
235
236 return ERR_PTR(error: err);
237}
238
239/**
240 * sunxi_rsb_device_unregister(): unregister an RSB device
241 * @rdev: rsb_device to be removed
242 */
243static void sunxi_rsb_device_unregister(struct sunxi_rsb_device *rdev)
244{
245 device_unregister(dev: &rdev->dev);
246}
247
248static int sunxi_rsb_remove_devices(struct device *dev, void *data)
249{
250 struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(d: dev);
251
252 if (dev->bus == &sunxi_rsb_bus)
253 sunxi_rsb_device_unregister(rdev);
254
255 return 0;
256}
257
258/**
259 * sunxi_rsb_driver_register() - Register device driver with RSB core
260 * @rdrv: device driver to be associated with slave-device.
261 *
262 * This API will register the client driver with the RSB framework.
263 * It is typically called from the driver's module-init function.
264 */
265int sunxi_rsb_driver_register(struct sunxi_rsb_driver *rdrv)
266{
267 rdrv->driver.bus = &sunxi_rsb_bus;
268 return driver_register(drv: &rdrv->driver);
269}
270EXPORT_SYMBOL_GPL(sunxi_rsb_driver_register);
271
272/* common code that starts a transfer */
273static int _sunxi_rsb_run_xfer(struct sunxi_rsb *rsb)
274{
275 u32 int_mask, status;
276 bool timeout;
277
278 if (readl(addr: rsb->regs + RSB_CTRL) & RSB_CTRL_START_TRANS) {
279 dev_dbg(rsb->dev, "RSB transfer still in progress\n");
280 return -EBUSY;
281 }
282
283 reinit_completion(x: &rsb->complete);
284
285 int_mask = RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR | RSB_INTS_TRANS_OVER;
286 writel(val: int_mask, addr: rsb->regs + RSB_INTE);
287 writel(RSB_CTRL_START_TRANS | RSB_CTRL_GLOBAL_INT_ENB,
288 addr: rsb->regs + RSB_CTRL);
289
290 if (irqs_disabled()) {
291 timeout = readl_poll_timeout_atomic(rsb->regs + RSB_INTS,
292 status, (status & int_mask),
293 10, 100000);
294 writel(val: status, addr: rsb->regs + RSB_INTS);
295 } else {
296 timeout = !wait_for_completion_io_timeout(x: &rsb->complete,
297 timeout: msecs_to_jiffies(m: 100));
298 status = rsb->status;
299 }
300
301 if (timeout) {
302 dev_dbg(rsb->dev, "RSB timeout\n");
303
304 /* abort the transfer */
305 writel(RSB_CTRL_ABORT_TRANS, addr: rsb->regs + RSB_CTRL);
306
307 /* clear any interrupt flags */
308 writel(readl(addr: rsb->regs + RSB_INTS), addr: rsb->regs + RSB_INTS);
309
310 return -ETIMEDOUT;
311 }
312
313 if (status & RSB_INTS_LOAD_BSY) {
314 dev_dbg(rsb->dev, "RSB busy\n");
315 return -EBUSY;
316 }
317
318 if (status & RSB_INTS_TRANS_ERR) {
319 if (status & RSB_INTS_TRANS_ERR_ACK) {
320 dev_dbg(rsb->dev, "RSB slave nack\n");
321 return -EINVAL;
322 }
323
324 if (status & RSB_INTS_TRANS_ERR_DATA) {
325 dev_dbg(rsb->dev, "RSB transfer data error\n");
326 return -EIO;
327 }
328 }
329
330 return 0;
331}
332
333static int sunxi_rsb_read(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
334 u32 *buf, size_t len)
335{
336 u32 cmd;
337 int ret;
338
339 if (!buf)
340 return -EINVAL;
341
342 switch (len) {
343 case 1:
344 cmd = RSB_CMD_RD8;
345 break;
346 case 2:
347 cmd = RSB_CMD_RD16;
348 break;
349 case 4:
350 cmd = RSB_CMD_RD32;
351 break;
352 default:
353 dev_err(rsb->dev, "Invalid access width: %zd\n", len);
354 return -EINVAL;
355 }
356
357 ret = pm_runtime_resume_and_get(dev: rsb->dev);
358 if (ret)
359 return ret;
360
361 mutex_lock(&rsb->lock);
362
363 writel(val: addr, addr: rsb->regs + RSB_ADDR);
364 writel(RSB_DAR_RTA(rtaddr), addr: rsb->regs + RSB_DAR);
365 writel(val: cmd, addr: rsb->regs + RSB_CMD);
366
367 ret = _sunxi_rsb_run_xfer(rsb);
368 if (ret)
369 goto unlock;
370
371 *buf = readl(addr: rsb->regs + RSB_DATA) & GENMASK(len * 8 - 1, 0);
372
373unlock:
374 mutex_unlock(lock: &rsb->lock);
375
376 pm_runtime_put_autosuspend(dev: rsb->dev);
377
378 return ret;
379}
380
381static int sunxi_rsb_write(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
382 const u32 *buf, size_t len)
383{
384 u32 cmd;
385 int ret;
386
387 if (!buf)
388 return -EINVAL;
389
390 switch (len) {
391 case 1:
392 cmd = RSB_CMD_WR8;
393 break;
394 case 2:
395 cmd = RSB_CMD_WR16;
396 break;
397 case 4:
398 cmd = RSB_CMD_WR32;
399 break;
400 default:
401 dev_err(rsb->dev, "Invalid access width: %zd\n", len);
402 return -EINVAL;
403 }
404
405 ret = pm_runtime_resume_and_get(dev: rsb->dev);
406 if (ret)
407 return ret;
408
409 mutex_lock(&rsb->lock);
410
411 writel(val: addr, addr: rsb->regs + RSB_ADDR);
412 writel(RSB_DAR_RTA(rtaddr), addr: rsb->regs + RSB_DAR);
413 writel(val: *buf, addr: rsb->regs + RSB_DATA);
414 writel(val: cmd, addr: rsb->regs + RSB_CMD);
415 ret = _sunxi_rsb_run_xfer(rsb);
416
417 mutex_unlock(lock: &rsb->lock);
418
419 pm_runtime_put_autosuspend(dev: rsb->dev);
420
421 return ret;
422}
423
424/* RSB regmap functions */
425struct sunxi_rsb_ctx {
426 struct sunxi_rsb_device *rdev;
427 int size;
428};
429
430static int regmap_sunxi_rsb_reg_read(void *context, unsigned int reg,
431 unsigned int *val)
432{
433 struct sunxi_rsb_ctx *ctx = context;
434 struct sunxi_rsb_device *rdev = ctx->rdev;
435
436 if (reg > 0xff)
437 return -EINVAL;
438
439 return sunxi_rsb_read(rsb: rdev->rsb, rtaddr: rdev->rtaddr, addr: reg, buf: val, len: ctx->size);
440}
441
442static int regmap_sunxi_rsb_reg_write(void *context, unsigned int reg,
443 unsigned int val)
444{
445 struct sunxi_rsb_ctx *ctx = context;
446 struct sunxi_rsb_device *rdev = ctx->rdev;
447
448 return sunxi_rsb_write(rsb: rdev->rsb, rtaddr: rdev->rtaddr, addr: reg, buf: &val, len: ctx->size);
449}
450
451static void regmap_sunxi_rsb_free_ctx(void *context)
452{
453 struct sunxi_rsb_ctx *ctx = context;
454
455 kfree(objp: ctx);
456}
457
458static const struct regmap_bus regmap_sunxi_rsb = {
459 .reg_write = regmap_sunxi_rsb_reg_write,
460 .reg_read = regmap_sunxi_rsb_reg_read,
461 .free_context = regmap_sunxi_rsb_free_ctx,
462 .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
463 .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
464};
465
466static struct sunxi_rsb_ctx *regmap_sunxi_rsb_init_ctx(struct sunxi_rsb_device *rdev,
467 const struct regmap_config *config)
468{
469 struct sunxi_rsb_ctx *ctx;
470
471 switch (config->val_bits) {
472 case 8:
473 case 16:
474 case 32:
475 break;
476 default:
477 return ERR_PTR(error: -EINVAL);
478 }
479
480 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
481 if (!ctx)
482 return ERR_PTR(error: -ENOMEM);
483
484 ctx->rdev = rdev;
485 ctx->size = config->val_bits / 8;
486
487 return ctx;
488}
489
490struct regmap *__devm_regmap_init_sunxi_rsb(struct sunxi_rsb_device *rdev,
491 const struct regmap_config *config,
492 struct lock_class_key *lock_key,
493 const char *lock_name)
494{
495 struct sunxi_rsb_ctx *ctx = regmap_sunxi_rsb_init_ctx(rdev, config);
496
497 if (IS_ERR(ptr: ctx))
498 return ERR_CAST(ptr: ctx);
499
500 return __devm_regmap_init(dev: &rdev->dev, bus: &regmap_sunxi_rsb, bus_context: ctx, config,
501 lock_key, lock_name);
502}
503EXPORT_SYMBOL_GPL(__devm_regmap_init_sunxi_rsb);
504
505/* RSB controller driver functions */
506static irqreturn_t sunxi_rsb_irq(int irq, void *dev_id)
507{
508 struct sunxi_rsb *rsb = dev_id;
509 u32 status;
510
511 status = readl(addr: rsb->regs + RSB_INTS);
512 rsb->status = status;
513
514 /* Clear interrupts */
515 status &= (RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR |
516 RSB_INTS_TRANS_OVER);
517 writel(val: status, addr: rsb->regs + RSB_INTS);
518
519 complete(&rsb->complete);
520
521 return IRQ_HANDLED;
522}
523
524static int sunxi_rsb_init_device_mode(struct sunxi_rsb *rsb)
525{
526 int ret = 0;
527 u32 reg;
528
529 /* send init sequence */
530 writel(RSB_DMCR_DEVICE_START | RSB_DMCR_MODE_DATA |
531 RSB_DMCR_MODE_REG | RSB_DMCR_DEV_ADDR, addr: rsb->regs + RSB_DMCR);
532
533 readl_poll_timeout(rsb->regs + RSB_DMCR, reg,
534 !(reg & RSB_DMCR_DEVICE_START), 100, 250000);
535 if (reg & RSB_DMCR_DEVICE_START)
536 ret = -ETIMEDOUT;
537
538 /* clear interrupt status bits */
539 writel(readl(addr: rsb->regs + RSB_INTS), addr: rsb->regs + RSB_INTS);
540
541 return ret;
542}
543
544/*
545 * There are 15 valid runtime addresses, though Allwinner typically
546 * skips the first, for unknown reasons, and uses the following three.
547 *
548 * 0x17, 0x2d, 0x3a, 0x4e, 0x59, 0x63, 0x74, 0x8b,
549 * 0x9c, 0xa6, 0xb1, 0xc5, 0xd2, 0xe8, 0xff
550 *
551 * No designs with 2 RSB slave devices sharing identical hardware
552 * addresses on the same bus have been seen in the wild. All designs
553 * use 0x2d for the primary PMIC, 0x3a for the secondary PMIC if
554 * there is one, and 0x45 for peripheral ICs.
555 *
556 * The hardware does not seem to support re-setting runtime addresses.
557 * Attempts to do so result in the slave devices returning a NACK.
558 * Hence we just hardcode the mapping here, like Allwinner does.
559 */
560
561static const struct sunxi_rsb_addr_map sunxi_rsb_addr_maps[] = {
562 { 0x3a3, 0x2d }, /* Primary PMIC: AXP223, AXP809, AXP81X, ... */
563 { 0x745, 0x3a }, /* Secondary PMIC: AXP806, ... */
564 { 0xe89, 0x4e }, /* Peripheral IC: AC100, ... */
565};
566
567static u8 sunxi_rsb_get_rtaddr(u16 hwaddr)
568{
569 int i;
570
571 for (i = 0; i < ARRAY_SIZE(sunxi_rsb_addr_maps); i++)
572 if (hwaddr == sunxi_rsb_addr_maps[i].hwaddr)
573 return sunxi_rsb_addr_maps[i].rtaddr;
574
575 return 0; /* 0 is an invalid runtime address */
576}
577
578static int of_rsb_register_devices(struct sunxi_rsb *rsb)
579{
580 struct device *dev = rsb->dev;
581 struct device_node *child, *np = dev->of_node;
582 u32 hwaddr;
583 u8 rtaddr;
584 int ret;
585
586 if (!np)
587 return -EINVAL;
588
589 /* Runtime addresses for all slaves should be set first */
590 for_each_available_child_of_node(np, child) {
591 dev_dbg(dev, "setting child %pOF runtime address\n",
592 child);
593
594 ret = of_property_read_u32(np: child, propname: "reg", out_value: &hwaddr);
595 if (ret) {
596 dev_err(dev, "%pOF: invalid 'reg' property: %d\n",
597 child, ret);
598 continue;
599 }
600
601 rtaddr = sunxi_rsb_get_rtaddr(hwaddr);
602 if (!rtaddr) {
603 dev_err(dev, "%pOF: unknown hardware device address\n",
604 child);
605 continue;
606 }
607
608 /*
609 * Since no devices have been registered yet, we are the
610 * only ones using the bus, we can skip locking the bus.
611 */
612
613 /* setup command parameters */
614 writel(RSB_CMD_STRA, addr: rsb->regs + RSB_CMD);
615 writel(RSB_DAR_RTA(rtaddr) | RSB_DAR_DA(hwaddr),
616 addr: rsb->regs + RSB_DAR);
617
618 /* send command */
619 ret = _sunxi_rsb_run_xfer(rsb);
620 if (ret)
621 dev_warn(dev, "%pOF: set runtime address failed: %d\n",
622 child, ret);
623 }
624
625 /* Then we start adding devices and probing them */
626 for_each_available_child_of_node(np, child) {
627 struct sunxi_rsb_device *rdev;
628
629 dev_dbg(dev, "adding child %pOF\n", child);
630
631 ret = of_property_read_u32(np: child, propname: "reg", out_value: &hwaddr);
632 if (ret)
633 continue;
634
635 rtaddr = sunxi_rsb_get_rtaddr(hwaddr);
636 if (!rtaddr)
637 continue;
638
639 rdev = sunxi_rsb_device_create(rsb, node: child, hwaddr, rtaddr);
640 if (IS_ERR(ptr: rdev))
641 dev_err(dev, "failed to add child device %pOF: %ld\n",
642 child, PTR_ERR(rdev));
643 }
644
645 return 0;
646}
647
648static int sunxi_rsb_hw_init(struct sunxi_rsb *rsb)
649{
650 struct device *dev = rsb->dev;
651 unsigned long p_clk_freq;
652 u32 clk_delay, reg;
653 int clk_div, ret;
654
655 ret = clk_prepare_enable(clk: rsb->clk);
656 if (ret) {
657 dev_err(dev, "failed to enable clk: %d\n", ret);
658 return ret;
659 }
660
661 ret = reset_control_deassert(rstc: rsb->rstc);
662 if (ret) {
663 dev_err(dev, "failed to deassert reset line: %d\n", ret);
664 goto err_clk_disable;
665 }
666
667 /* reset the controller */
668 writel(RSB_CTRL_SOFT_RST, addr: rsb->regs + RSB_CTRL);
669 readl_poll_timeout(rsb->regs + RSB_CTRL, reg,
670 !(reg & RSB_CTRL_SOFT_RST), 1000, 100000);
671
672 /*
673 * Clock frequency and delay calculation code is from
674 * Allwinner U-boot sources.
675 *
676 * From A83 user manual:
677 * bus clock frequency = parent clock frequency / (2 * (divider + 1))
678 */
679 p_clk_freq = clk_get_rate(clk: rsb->clk);
680 clk_div = p_clk_freq / rsb->clk_freq / 2;
681 if (!clk_div)
682 clk_div = 1;
683 else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1)
684 clk_div = RSB_CCR_MAX_CLK_DIV + 1;
685
686 clk_delay = clk_div >> 1;
687 if (!clk_delay)
688 clk_delay = 1;
689
690 dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2);
691 writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1),
692 addr: rsb->regs + RSB_CCR);
693
694 return 0;
695
696err_clk_disable:
697 clk_disable_unprepare(clk: rsb->clk);
698
699 return ret;
700}
701
702static void sunxi_rsb_hw_exit(struct sunxi_rsb *rsb)
703{
704 reset_control_assert(rstc: rsb->rstc);
705
706 /* Keep the clock and PM reference counts consistent. */
707 if (!pm_runtime_status_suspended(dev: rsb->dev))
708 clk_disable_unprepare(clk: rsb->clk);
709}
710
711static int __maybe_unused sunxi_rsb_runtime_suspend(struct device *dev)
712{
713 struct sunxi_rsb *rsb = dev_get_drvdata(dev);
714
715 clk_disable_unprepare(clk: rsb->clk);
716
717 return 0;
718}
719
720static int __maybe_unused sunxi_rsb_runtime_resume(struct device *dev)
721{
722 struct sunxi_rsb *rsb = dev_get_drvdata(dev);
723
724 return clk_prepare_enable(clk: rsb->clk);
725}
726
727static int __maybe_unused sunxi_rsb_suspend(struct device *dev)
728{
729 struct sunxi_rsb *rsb = dev_get_drvdata(dev);
730
731 sunxi_rsb_hw_exit(rsb);
732
733 return 0;
734}
735
736static int __maybe_unused sunxi_rsb_resume(struct device *dev)
737{
738 struct sunxi_rsb *rsb = dev_get_drvdata(dev);
739
740 return sunxi_rsb_hw_init(rsb);
741}
742
743static int sunxi_rsb_probe(struct platform_device *pdev)
744{
745 struct device *dev = &pdev->dev;
746 struct device_node *np = dev->of_node;
747 struct sunxi_rsb *rsb;
748 u32 clk_freq = 3000000;
749 int irq, ret;
750
751 of_property_read_u32(np, propname: "clock-frequency", out_value: &clk_freq);
752 if (clk_freq > RSB_MAX_FREQ)
753 return dev_err_probe(dev, err: -EINVAL,
754 fmt: "clock-frequency (%u Hz) is too high (max = 20MHz)\n",
755 clk_freq);
756
757 rsb = devm_kzalloc(dev, size: sizeof(*rsb), GFP_KERNEL);
758 if (!rsb)
759 return -ENOMEM;
760
761 rsb->dev = dev;
762 rsb->clk_freq = clk_freq;
763 platform_set_drvdata(pdev, data: rsb);
764 rsb->regs = devm_platform_ioremap_resource(pdev, index: 0);
765 if (IS_ERR(ptr: rsb->regs))
766 return PTR_ERR(ptr: rsb->regs);
767
768 irq = platform_get_irq(pdev, 0);
769 if (irq < 0)
770 return irq;
771
772 rsb->clk = devm_clk_get(dev, NULL);
773 if (IS_ERR(ptr: rsb->clk))
774 return dev_err_probe(dev, err: PTR_ERR(ptr: rsb->clk),
775 fmt: "failed to retrieve clk\n");
776
777 rsb->rstc = devm_reset_control_get(dev, NULL);
778 if (IS_ERR(ptr: rsb->rstc))
779 return dev_err_probe(dev, err: PTR_ERR(ptr: rsb->rstc),
780 fmt: "failed to retrieve reset controller\n");
781
782 init_completion(x: &rsb->complete);
783 mutex_init(&rsb->lock);
784
785 ret = devm_request_irq(dev, irq, handler: sunxi_rsb_irq, irqflags: 0, RSB_CTRL_NAME, dev_id: rsb);
786 if (ret)
787 return dev_err_probe(dev, err: ret,
788 fmt: "can't register interrupt handler irq %d\n", irq);
789
790 ret = sunxi_rsb_hw_init(rsb);
791 if (ret)
792 return ret;
793
794 /* initialize all devices on the bus into RSB mode */
795 ret = sunxi_rsb_init_device_mode(rsb);
796 if (ret)
797 dev_warn(dev, "Initialize device mode failed: %d\n", ret);
798
799 pm_suspend_ignore_children(dev, enable: true);
800 pm_runtime_set_active(dev);
801 pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC);
802 pm_runtime_use_autosuspend(dev);
803 pm_runtime_enable(dev);
804
805 of_rsb_register_devices(rsb);
806
807 return 0;
808}
809
810static void sunxi_rsb_remove(struct platform_device *pdev)
811{
812 struct sunxi_rsb *rsb = platform_get_drvdata(pdev);
813
814 device_for_each_child(parent: rsb->dev, NULL, fn: sunxi_rsb_remove_devices);
815 pm_runtime_disable(dev: &pdev->dev);
816 sunxi_rsb_hw_exit(rsb);
817}
818
819static const struct dev_pm_ops sunxi_rsb_dev_pm_ops = {
820 SET_RUNTIME_PM_OPS(sunxi_rsb_runtime_suspend,
821 sunxi_rsb_runtime_resume, NULL)
822 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sunxi_rsb_suspend, sunxi_rsb_resume)
823};
824
825static const struct of_device_id sunxi_rsb_of_match_table[] = {
826 { .compatible = "allwinner,sun8i-a23-rsb" },
827 {}
828};
829MODULE_DEVICE_TABLE(of, sunxi_rsb_of_match_table);
830
831static struct platform_driver sunxi_rsb_driver = {
832 .probe = sunxi_rsb_probe,
833 .remove = sunxi_rsb_remove,
834 .driver = {
835 .name = RSB_CTRL_NAME,
836 .of_match_table = sunxi_rsb_of_match_table,
837 .pm = &sunxi_rsb_dev_pm_ops,
838 },
839};
840
841static int __init sunxi_rsb_init(void)
842{
843 int ret;
844
845 ret = bus_register(bus: &sunxi_rsb_bus);
846 if (ret) {
847 pr_err("failed to register sunxi sunxi_rsb bus: %d\n", ret);
848 return ret;
849 }
850
851 ret = platform_driver_register(&sunxi_rsb_driver);
852 if (ret) {
853 bus_unregister(bus: &sunxi_rsb_bus);
854 return ret;
855 }
856
857 return 0;
858}
859module_init(sunxi_rsb_init);
860
861static void __exit sunxi_rsb_exit(void)
862{
863 platform_driver_unregister(&sunxi_rsb_driver);
864 bus_unregister(bus: &sunxi_rsb_bus);
865}
866module_exit(sunxi_rsb_exit);
867
868MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
869MODULE_DESCRIPTION("Allwinner sunXi Reduced Serial Bus controller driver");
870MODULE_LICENSE("GPL v2");
871

source code of linux/drivers/bus/sunxi-rsb.c