| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* |
| 3 | * Copyright (C) 2012 Advanced Micro Devices, Inc. |
| 4 | * Author: Joerg Roedel <joerg.roedel@amd.com> |
| 5 | * |
| 6 | * This header file contains the interface of the interrupt remapping code to |
| 7 | * the x86 interrupt management code. |
| 8 | */ |
| 9 | |
| 10 | #ifndef __X86_IRQ_REMAPPING_H |
| 11 | #define __X86_IRQ_REMAPPING_H |
| 12 | |
| 13 | #include <asm/irqdomain.h> |
| 14 | #include <asm/hw_irq.h> |
| 15 | #include <asm/io_apic.h> |
| 16 | |
| 17 | struct msi_msg; |
| 18 | struct irq_alloc_info; |
| 19 | |
| 20 | enum irq_remap_cap { |
| 21 | IRQ_POSTING_CAP = 0, |
| 22 | }; |
| 23 | |
| 24 | enum { |
| 25 | IRQ_REMAP_XAPIC_MODE, |
| 26 | IRQ_REMAP_X2APIC_MODE, |
| 27 | }; |
| 28 | |
| 29 | /* |
| 30 | * This is mainly used to communicate information back-and-forth |
| 31 | * between SVM and IOMMU for setting up and tearing down posted |
| 32 | * interrupt |
| 33 | */ |
| 34 | struct amd_iommu_pi_data { |
| 35 | u64 vapic_addr; /* Physical address of the vCPU's vAPIC. */ |
| 36 | u32 ga_tag; |
| 37 | u32 vector; /* Guest vector of the interrupt */ |
| 38 | int cpu; |
| 39 | bool ga_log_intr; |
| 40 | bool is_guest_mode; |
| 41 | void *ir_data; |
| 42 | }; |
| 43 | |
| 44 | struct intel_iommu_pi_data { |
| 45 | u64 pi_desc_addr; /* Physical address of PI Descriptor */ |
| 46 | u32 vector; /* Guest vector of the interrupt */ |
| 47 | }; |
| 48 | |
| 49 | #ifdef CONFIG_IRQ_REMAP |
| 50 | |
| 51 | extern raw_spinlock_t irq_2_ir_lock; |
| 52 | |
| 53 | extern bool irq_remapping_cap(enum irq_remap_cap cap); |
| 54 | extern void set_irq_remapping_broken(void); |
| 55 | extern int irq_remapping_prepare(void); |
| 56 | extern int irq_remapping_enable(void); |
| 57 | extern void irq_remapping_disable(void); |
| 58 | extern int irq_remapping_reenable(int); |
| 59 | extern int irq_remap_enable_fault_handling(void); |
| 60 | extern void panic_if_irq_remap(const char *msg); |
| 61 | |
| 62 | /* Get parent irqdomain for interrupt remapping irqdomain */ |
| 63 | static inline struct irq_domain *arch_get_ir_parent_domain(void) |
| 64 | { |
| 65 | return x86_vector_domain; |
| 66 | } |
| 67 | |
| 68 | extern bool enable_posted_msi; |
| 69 | |
| 70 | static inline bool posted_msi_supported(void) |
| 71 | { |
| 72 | return enable_posted_msi && irq_remapping_cap(cap: IRQ_POSTING_CAP); |
| 73 | } |
| 74 | |
| 75 | #else /* CONFIG_IRQ_REMAP */ |
| 76 | |
| 77 | static inline bool irq_remapping_cap(enum irq_remap_cap cap) { return 0; } |
| 78 | static inline void set_irq_remapping_broken(void) { } |
| 79 | static inline int irq_remapping_prepare(void) { return -ENODEV; } |
| 80 | static inline int irq_remapping_enable(void) { return -ENODEV; } |
| 81 | static inline void irq_remapping_disable(void) { } |
| 82 | static inline int irq_remapping_reenable(int eim) { return -ENODEV; } |
| 83 | static inline int irq_remap_enable_fault_handling(void) { return -ENODEV; } |
| 84 | |
| 85 | static inline void panic_if_irq_remap(const char *msg) |
| 86 | { |
| 87 | } |
| 88 | |
| 89 | #endif /* CONFIG_IRQ_REMAP */ |
| 90 | |
| 91 | #ifdef CONFIG_X86_POSTED_MSI |
| 92 | void intel_ack_posted_msi_irq(struct irq_data *irqd); |
| 93 | #else |
| 94 | #define intel_ack_posted_msi_irq NULL |
| 95 | #endif |
| 96 | |
| 97 | #endif /* __X86_IRQ_REMAPPING_H */ |
| 98 | |