| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | #ifndef _ASM_X86_I8259_H |
| 3 | #define _ASM_X86_I8259_H |
| 4 | |
| 5 | #include <linux/delay.h> |
| 6 | #include <asm/io.h> |
| 7 | |
| 8 | extern unsigned int cached_irq_mask; |
| 9 | |
| 10 | #define __byte(x, y) (((unsigned char *)&(y))[x]) |
| 11 | #define cached_master_mask (__byte(0, cached_irq_mask)) |
| 12 | #define cached_slave_mask (__byte(1, cached_irq_mask)) |
| 13 | |
| 14 | /* i8259A PIC registers */ |
| 15 | #define PIC_MASTER_CMD 0x20 |
| 16 | #define PIC_MASTER_IMR 0x21 |
| 17 | #define PIC_MASTER_ISR PIC_MASTER_CMD |
| 18 | #define PIC_MASTER_POLL PIC_MASTER_ISR |
| 19 | #define PIC_MASTER_OCW3 PIC_MASTER_ISR |
| 20 | #define PIC_SLAVE_CMD 0xa0 |
| 21 | #define PIC_SLAVE_IMR 0xa1 |
| 22 | #define PIC_ELCR1 0x4d0 |
| 23 | #define PIC_ELCR2 0x4d1 |
| 24 | |
| 25 | /* i8259A PIC related value */ |
| 26 | #define PIC_CASCADE_IR 2 |
| 27 | #define MASTER_ICW4_DEFAULT 0x01 |
| 28 | #define SLAVE_ICW4_DEFAULT 0x01 |
| 29 | #define PIC_ICW4_AEOI 2 |
| 30 | |
| 31 | extern raw_spinlock_t i8259A_lock; |
| 32 | |
| 33 | /* the PIC may need a careful delay on some platforms, hence specific calls */ |
| 34 | static inline unsigned char inb_pic(unsigned int port) |
| 35 | { |
| 36 | unsigned char value = inb(port); |
| 37 | |
| 38 | /* |
| 39 | * delay for some accesses to PIC on motherboard or in chipset |
| 40 | * must be at least one microsecond, so be safe here: |
| 41 | */ |
| 42 | udelay(usec: 2); |
| 43 | |
| 44 | return value; |
| 45 | } |
| 46 | |
| 47 | static inline void outb_pic(unsigned char value, unsigned int port) |
| 48 | { |
| 49 | outb(value, port); |
| 50 | /* |
| 51 | * delay for some accesses to PIC on motherboard or in chipset |
| 52 | * must be at least one microsecond, so be safe here: |
| 53 | */ |
| 54 | udelay(usec: 2); |
| 55 | } |
| 56 | |
| 57 | extern struct irq_chip i8259A_chip; |
| 58 | |
| 59 | struct legacy_pic { |
| 60 | int nr_legacy_irqs; |
| 61 | struct irq_chip *chip; |
| 62 | void (*mask)(unsigned int irq); |
| 63 | void (*unmask)(unsigned int irq); |
| 64 | void (*mask_all)(void); |
| 65 | void (*restore_mask)(void); |
| 66 | void (*init)(int auto_eoi); |
| 67 | int (*probe)(void); |
| 68 | int (*irq_pending)(unsigned int irq); |
| 69 | void (*make_irq)(unsigned int irq); |
| 70 | }; |
| 71 | |
| 72 | void legacy_pic_pcat_compat(void); |
| 73 | |
| 74 | extern struct legacy_pic *legacy_pic; |
| 75 | extern struct legacy_pic null_legacy_pic; |
| 76 | |
| 77 | static inline bool has_legacy_pic(void) |
| 78 | { |
| 79 | return legacy_pic != &null_legacy_pic; |
| 80 | } |
| 81 | |
| 82 | static inline int nr_legacy_irqs(void) |
| 83 | { |
| 84 | return legacy_pic->nr_legacy_irqs; |
| 85 | } |
| 86 | |
| 87 | #endif /* _ASM_X86_I8259_H */ |
| 88 | |