1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_X86_EXTABLE_H
3#define _ASM_X86_EXTABLE_H
4
5#include <asm/extable_fixup_types.h>
6
7/*
8 * The exception table consists of two addresses relative to the
9 * exception table entry itself and a type selector field.
10 *
11 * The first address is of an instruction that is allowed to fault, the
12 * second is the target at which the program should continue.
13 *
14 * The type entry is used by fixup_exception() to select the handler to
15 * deal with the fault caused by the instruction in the first field.
16 *
17 * All the routines below use bits of fixup code that are out of line
18 * with the main instruction path. This means when everything is well,
19 * we don't even have to jump over them. Further, they do not intrude
20 * on our cache or tlb entries.
21 */
22
23struct exception_table_entry {
24 int insn, fixup, data;
25};
26struct pt_regs;
27
28#define ARCH_HAS_RELATIVE_EXTABLE
29
30#define swap_ex_entry_fixup(a, b, tmp, delta) \
31 do { \
32 (a)->fixup = (b)->fixup + (delta); \
33 (b)->fixup = (tmp).fixup - (delta); \
34 (a)->data = (b)->data; \
35 (b)->data = (tmp).data; \
36 } while (0)
37
38extern int fixup_exception(struct pt_regs *regs, int trapnr,
39 unsigned long error_code, unsigned long fault_addr);
40extern int ex_get_fixup_type(unsigned long ip);
41extern void early_fixup_exception(struct pt_regs *regs, int trapnr);
42
43#ifdef CONFIG_X86_MCE
44extern void __noreturn ex_handler_msr_mce(struct pt_regs *regs, bool wrmsr);
45#else
46static inline void __noreturn ex_handler_msr_mce(struct pt_regs *regs, bool wrmsr)
47{
48 for (;;)
49 cpu_relax();
50}
51#endif
52
53#if defined(CONFIG_BPF_JIT) && defined(CONFIG_X86_64)
54bool ex_handler_bpf(const struct exception_table_entry *x, struct pt_regs *regs);
55#else
56static inline bool ex_handler_bpf(const struct exception_table_entry *x,
57 struct pt_regs *regs) { return false; }
58#endif
59
60#endif
61

source code of linux/arch/x86/include/asm/extable.h